Realization of Analog Wavelet Filter using Hybrid Genetic Algorithm for On-line Epileptic Event Detection

© 2020 The Author(s). This open access work is licensed under a Creative Commons Attribution 4.0 License. For more information, see http://creativecommons.org/licenses/by/4.0/.As the evolution of traditional electroencephalogram (EEG) monitoring unit for epilepsy diagnosis, wearable ambulatory EEG (WAEEG) system transmits EEG data wirelessly, and can be made miniaturized, discrete and social acceptable. To prolong the battery lifetime, analog wavelet filter is used for epileptic event detection in WAEEG system to achieve on-line data reduction. For mapping continuous wavelet transform to analog filter implementation with low-power consumption and high approximation accuracy, this paper proposes a novel approximation method to construct the wavelet base in analog domain, in which the approximation process in frequency domain is considered as an optimization problem by building a mathematical model with only one term in the numerator. The hybrid genetic algorithm consisting of genetic algorithm and quasi-Newton method is employed to find the globally optimum solution, taking required stability into account. Experiment results show that the proposed method can give a stable analog wavelet base with simple structure and higher approximation accuracy compared with existing method, leading to a better spike detection accuracy. The fourth-order Marr wavelet filter is designed as an example using Gm-C filter structure based on LC ladder simulation, whose power consumption is only 33.4 pW at 2.1Hz. Simulation results show that the design method can be used to facilitate low power and small volume implementation of on-line epileptic event detector.Peer reviewe

A 60 pW g(m)C Continuous Wavelet Transform Circuit for Portable EEG Systems

Accepted versio

Wearable electroencephalography for long-term monitoring and diagnostic purposes

Truly Wearable EEG (WEEG) can be considered as the future of ambulatory EEG units, which are the current standard for long-term EEG monitoring. Replacing these short lifetime, bulky units with long-lasting, miniature and wearable devices that can be easily worn by patients will result in more EEG data being collected for extended monitoring periods. This thesis presents three new fabricated systems, in the form of Application Specific Integrated Circuits (ASICs), to aid the diagnosis of epilepsy and sleep disorders by detecting specific clinically important EEG events on the sensor node, while discarding background activity. The power consumption of the WEEG monitoring device incorporating these systems can be reduced since the transmitter, which is the dominating element in terms of power consumption, will only become active based on the output of these systems. Candidate interictal activity is identified by the developed analog-based interictal spike selection system-on-chip (SoC), using an approximation of the Continuous Wavelet Transform (CWT), as a bandpass filter, and thresholding. The spike selection SoC is fabricated in a 0.35 μm CMOS process and consumes 950 nW. Experimental results reveal that the SoC is able to identify 87% of interictal spikes correctly while only transmitting 45% of the data. Sections of EEG data containing likely ictal activity are detected by an analog seizure selection SoC using the low complexity line length feature. This SoC is fabricated in a 0.18 μm CMOS technology and consumes 1.14 μW. Based on experimental results, the fabricated SoC is able to correctly detect 83% of seizure episodes while transmitting 52% of the overall EEG data. A single-channel analog-based sleep spindle detection SoC is developed to aid the diagnosis of sleep disorders by detecting sleep spindles, which are characteristic events of sleep. The system identifies spindle events by monitoring abrupt changes in the input EEG. An approximation of the median frequency calculation, incorporated as part of the system, allows for non-spindle activity incorrectly identified by the system as sleep spindles to be discarded. The sleep spindle detection SoC is fabricated in a 0.18 μm CMOS technology, consuming only 515 nW. The SoC achieves a sensitivity and specificity of 71.5% and 98% respectively.Open Acces

A verification technique for multiple soft fault diagnosis of linear analog circuits

The paper deals with multiple soft fault diagnosis of linear analog circuits. A fault verification method is developed that allows estimating the values of a set of the parameters considered as potentially faulty. The method exploits the transmittance of the circuit and is based on a diagnostic test leading to output signal in discrete form. Applying Z-transform a diagnostic equation is written which is next reproduced. The obtained system of equations consisting of larger number of equations than the number of the parameters is solved using appropriate numerical approach. The method is adapted to real circumstances taking into account scattering of the fault–free parameters within their tolerance ranges and some errors produced by the method. In consequence, the results provided by the method have the form of ranges including the values of the tested parameters. To illustrate the method two examples of real electronic circuits are given

An analogue approach for the processing of biomedical signals

Constant device scaling has signifcantly boosted electronic systems design in the digital domain enabling incorporation of more functionality within small silicon area and at the same time allows high-speed computation. This trend has been exploited for developing high-performance miniaturised systems in a number of application areas like communication, sensor network, main frame computers, biomedical information processing etc. Although successful, the associated cost comes in the form of high leakage power dissipation and systems reliability. With the increase of customer demands for smarter and faster technologies and with the advent of pervasive information processing, these issues may prove to be limiting factors for application of traditional digital design techniques. Furthermore, as the limit of device scaling is nearing, performance enhancement for the conventional digital system design methodology cannot be achieved any further unless innovations in new materials and new transistor design are made. To this end, an alternative design methodology that may enable performance enhancement without depending on device scaling is much sought today.Analogue design technique is one of these alternative techniques that have recently gained considerable interests. Although it is well understood that there are several roadblocks still to be overcome for making analogue-based system design for information processing as the main-stream design technique (e.g., lack of automated design tool, noise performance, efficient passive components implementation on silicon etc.), it may offer a faster way of realising a system with very few components and therefore may have a positive implication on systems performance enhancement. The main aim of this thesis is to explore possible ways of information processing using analogue design techniques in particular in the field of biomedical systems

GaAs Implementation of FIR Filter

This thesis discusses the findings of the final year project involving Gallium Arsenide implementation of a triangular FIR filter to perform discrete wavelet transforms. The overall characteristics of Gallium Arsenide technology- its construction, behaviour and electrical charactersitics as they apply to VLSI technology - were investigated in this project. In depth understanding of its architecture is required to be able to understand the various design techniques employed. A comparison of Silicon and GaAs performance and other characteristics has also been made to fully justify the choice of this material for system implementation. A lot of research and active interest has gone into the field of image and video compression. Wavelet-based image transformation is one of the very efficient compression techniques used. An analysis of discrete wavelet transformations and the required triangular FIR filter was done to be able to produce a transform algorithm and the related filter architecture. Finally, the filter architecture was implemented as a VLSI design and layout. A variety of functional blocks required for the architecture were designed, tested and analysed. All these blocks were integrated to produce a model of a complete filter cell. The filter implementation was designed to be self-timed - without a system clock. Self-timed systems have considerable advantages over clocked architectures. Various design styles and handshaking mechanisms involved in designing a self-timed system were analysed and designed. There are many avenues still to explore. One of them is the VHDL analysis of filter architecture. Further development on this project would involve integration of higher-level logic and formation of a complete filter array

Measurements, Models, Systems and Design

531 s.

An ECG-on-Chip with QRS Detection & Lossless Compression for Low Power Wireless Sensors

IEEE Transactions on Circuits and Systems II: Express BriefsPP991-

Primitives and design of the intelligent pixel multimedia communicator

Communication systems arc an ever more essential component of our modern global society. Mobile communications systems are still in a state of rapid advancement and growth. Technology is constantly evolving at a rapid pace in ever more diverse areas and the emerging mobile multimedia based communication systems offer new challenges for both current and future technologies. To realise the full potential of mobile multimedia communication systems there is a need to explore new options to solve some of the fundamental problems facing the technology. In particular, the complexity of such a system within an infrastructure framework that is inherently limited by its power sources and has very restricted transmission bandwidth demands new methodologies and approaches