651 research outputs found
FPGA Implementation of Gaussian Mixture Model Algorithm for 47 fps Segmentation of 1080p Video
Circuits and systems able to process high quality video in real time are fundamental in nowadays imaging systems. The circuit proposed in the paper, aimed at the robust identification of the background in video streams, implements the improved formulation of the Gaussian Mixture Model (GMM) algorithm that is included in the OpenCV library. An innovative, hardware oriented, formulation of the GMM equations, the use of truncated binary multipliers, and ROM compression techniques allow reduced hardware complexity and increased processing capability. The proposed circuit has been designed having commercial FPGA devices as target and provides speed and logic resources occupation that overcome previously proposed implementations. The circuit, when implemented on Virtex6 or StratixIV, processes more than 45 frame per second in 1080p format and uses few percent of FPGA logic resources
Implementation and Applications of Logarithmic Signal Processing on an FPGA
This thesis presents two novel algorithms for converting a normalised binary floating point number into a binary logarithmic number with the single-precision of a floating point number. The thesis highlights the importance of logarithmic number systems in real-time DSP applications. A real-time cross-correlation application where logarithmic signal processing is used to simplify the complex computation is presented.
The first algorithm presented in this thesis comprises two stages. A piecewise linear approximation to the original logarithmic curve is performed in the first stage and a scaled-down normalised error curve is stored in the second stage. The algorithm requires less than 20 kbits of ROM and a maximum of three small multipliers. The architecture is implemented on Xilinx's Spartan3 and Spartan6 FPGA family. Synthesis results confirm that the algorithm operates at a frequency of 42.3 MHz on a Spartan3 device and 127.8 MHz on a Spartan6. Both solutions have a pipeline latency of two clocks. The operating speed increases to 71.4 MHz and 160 MHz respectively when the pipeline latencies increase to eight clocks.
The proposed algorithm is further improved by using a PWL (Piece-Wise Linear) approximation of the transform curve combined with a PWL approximation of a scaled version of the normalized segment error. A hardware approach for reducing the memory with additional XOR gates in the second stage is also presented. The architecture presented uses just one 18k bit Block RAM (BRAM) and synthesis results indicate operating frequencies of 93 and 110 MHz when implemented on the Xilinx Spartan3 and Spartan6 devices respectively.
Finally a novel prototype of an FPGA-based four channel correlation velocimetry system is presented. The system operates at a higher sampling frquency than previous published work and outputs the new result after every new sample it receives. The system works at a sampling frequency of 195.31 kHz and a sample resolution of 12 bits. The prototype system calculates a delay in a range of 0 to 2.6 ms with a resolution of 5.12 us
Customisable arithmetic hardware designs
Imperial Users onl
A Review on Deep Learning in Medical Image Reconstruction
Medical imaging is crucial in modern clinics to guide the diagnosis and
treatment of diseases. Medical image reconstruction is one of the most
fundamental and important components of medical imaging, whose major objective
is to acquire high-quality medical images for clinical usage at the minimal
cost and risk to the patients. Mathematical models in medical image
reconstruction or, more generally, image restoration in computer vision, have
been playing a prominent role. Earlier mathematical models are mostly designed
by human knowledge or hypothesis on the image to be reconstructed, and we shall
call these models handcrafted models. Later, handcrafted plus data-driven
modeling started to emerge which still mostly relies on human designs, while
part of the model is learned from the observed data. More recently, as more
data and computation resources are made available, deep learning based models
(or deep models) pushed the data-driven modeling to the extreme where the
models are mostly based on learning with minimal human designs. Both
handcrafted and data-driven modeling have their own advantages and
disadvantages. One of the major research trends in medical imaging is to
combine handcrafted modeling with deep modeling so that we can enjoy benefits
from both approaches. The major part of this article is to provide a conceptual
review of some recent works on deep modeling from the unrolling dynamics
viewpoint. This viewpoint stimulates new designs of neural network
architectures with inspirations from optimization algorithms and numerical
differential equations. Given the popularity of deep modeling, there are still
vast remaining challenges in the field, as well as opportunities which we shall
discuss at the end of this article.Comment: 31 pages, 6 figures. Survey pape
Ultra-Fast, High-Performance 8x8 Approximate Multipliers by a New Multicolumn 3,3:2 Inexact Compressor and its Derivatives
Multiplier, as a key role in many different applications, is a
time-consuming, energy-intensive computation block. Approximate computing is a
practical design paradigm that attempts to improve hardware efficacy while
keeping computation quality satisfactory. A novel multicolumn 3,3:2 inexact
compressor is presented in this paper. It takes three partial products from two
adjacent columns each for rapid partial product reduction. The proposed inexact
compressor and its derivates enable us to design a high-speed approximate
multiplier. Then, another ultra-fast, high-efficient approximate multiplier is
achieved utilizing a systematic truncation strategy. The proposed multipliers
accumulate partial products in only two stages, one fewer stage than other
approximate multipliers in the literature. Implementation results by Synopsys
Design Compiler and 45 nm technology node demonstrates nearly 11.11% higher
speed for the second proposed design over the fastest existing approximate
multiplier. Furthermore, the new approximate multipliers are applied to the
image processing application of image sharpening, and their performance in this
application is highly satisfactory. It is shown in this paper that the error
pattern of an approximate multiplier, in addition to the mean error distance
and error rate, has a direct effect on the outcomes of the image processing
application.Comment: 21 Pages, 18 Figures, 6 Table
Optimizing hardware function evaluation
Published versio
Sistemas de recolha de energia sem fios de alta eficiência
Mestrado em Engenharia Eléctrónica e TelecomunicaçõesNuma época em que os avanços tecnológicos se concretizam a um ritmo
frenético, verifica-se uma desproporcional evolução das capacidades das baterias,
essencialmente nos equipamentos móveis de uso comum. Por outro
lado aumentam os dispositivos cuja localização remota torna a manutenção
de baterias algo expensiosa e por vezes insustentável, tais como as Wireless
Sensor Networks (WSN)
O intuito deste trabalho prende-se não só com o aumento da eficiência
de sistemas de recolha de energia de radiação electromagnética da banda
dos 100MHz, como também com a introdução de novos métodos úteis à
a sua análise. Paralelamente é ainda proposto um sistema de iluminação
alimentado por circuitos de rectificação com um enfoque mais específico e
menos relacionado com as suas eficiências.
Ao nível dos melhores resultados obtidos para os circuitos de alta eficiência,
estes foram alcançados por um circuito rectificador série simples, com valores
de eficiência experimental de _ 45% para uma potência de entrada de
5dBm, gerando uma tensão de saída de _ 1:6V . Relativamente aos circuitos
desenvolvidos para o sistema de iluminação foi possível, através de um
multiplicador de tensão, gerar tensões DC ligeiramente acima de 8V para
uma potência de entrada de 10dBm, desta forma conseguindo alimentar
uma célula de três LEDs de baixo consumo.
Os resultados obtidos destinam-se não apenas a apresentar conclusões inovadoras,
mas também a fornecer ferramentas adequadas a posteriores desenvolvimentos
de sistemas similares, servindo desta forma como um contributo
de utilidade para a comunidade científica.At a time when technological advances happen every day, a disproportional
evolution of batteries capabilities has been verified, specially for mobile devices.
On the other hand the number of devices whose remote location makes
battery maintenance very expensive, Wireless Sensor Networks (WSN), is increasing.
The objective of this work is not only to increase the eficiency of energy
harvesting systems on the frequency of 100MHz, as it is introducing new
methods for it's analysis. At the same time a no-cost illumination system,
fed with more specific rectification systems, with less consideration for the
eficiency is proposed here.
As of the best results obtained for the high eficiency circuits, these were
achieved for a simple series rectifier, with eficiencies around 45% for an
input power of 5dBm, thus generating output voltages of _ 1:6V . The
circuits developed for the lighting system, consisting in voltage multipliers,
generated output voltage values around 8V for Pin = 10dBm, that is,
enough to power up a low consuming 3 Light-Emitting Diode (LED)s cell.
These obtained results are destined not only to present innovative conclusions,
but also to provide adequate tools for subsequent developments of
similar circuits, thus serving as a contribute for the scientific community
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