Reducing the memory for iteration-exchanged information and border future metrics in the HomePlug AV turbo decoder implementation

HomePlug AV is the most successful standard for in home power line communications. To combat non-ideality of the power line channel it includes a double binary turbo forward error correcting scheme. Unfortunately, it is known that the memory required by double binary turbo decoders for iteration-exchanged information is roughly three times the memory required for binary turbo codes. Moreover, high throughput implementations based on border state metric inheritance, require additional memories to store border state metrics from an iteration to the next one. This work faces these two aspects by analyzing compression techniques to reduce the amount of memory required to store both iteration-exchanged information and border future metrics. Experimental simulations show that non-uniform quantization and least significant bits dropping allow for a significant memory reduction (up to 30%) with a bit error rate performance loss of about 0.1 dB and a negligible logic gates overhead

VLSI Architectures for WIMAX Channel Decoders

This chapter describes the main architectures proposed in the literature to implement the channel decoders required by the WiMax standard, namely convolutional codes, turbo codes (both block and convolutional) and LDPC. Then it shows a complete design of a convolutional turbo code encoder/decoder system for WiMax.Comment: To appear in the book "WIMAX, New Developments", M. Upena, D. Dalal, Y. Kosta (Ed.), ISBN978-953-7619-53-

Double binary turbo codes analysis and decoder implementation

Ankara : The Department of Electrical and Electronics Engineering and the Institute of Engineering and Sciences of Bilkent University, 2008.Thesis (Master's) -- Bilkent University, 2008.Includes bibliographical references leaves 60-61.Classical Turbo Code presented in 1993 by Berrau et al. received great attention due to its near Shannon Limit decoding performance. Double Binary Circular Turbo Code is an improvement on Classical Turbo Code and widely used in today’s communication standards, such as IEEE 802.16 (WIMAX) and DVBRSC. Compared to Classical Turbo Codes, DB-CTC has better error-correcting capability but more computational complexity for the decoder scheme. In this work, various methods, offered to decrease the computational complexity and memory requirements of DB-CTC decoder in the literature, are analyzed to find the optimum solution for the FPGA implementation of the decoder. IEEE 802.16 standard is taken into account for all simulations presented in this work and different simulations are performed according to the specifications given in the standard. An efficient DB-CTC decoder is implemented on an FPGA board and compared with other implementations in the literature.Yılmaz, ÖzlemM.S

New Coding/Decoding Techniques for Wireless Communication Systems

Wireless communication encompasses cellular telephony systems (mobile communication), wireless sensor networks, satellite communication systems and many other applications. Studies relevant to wireless communication deal with maintaining reliable and efficient exchange of information between the transmitter and receiver over a wireless channel. The most practical approach to facilitate reliable communication is using channel coding. In this dissertation we propose novel coding and decoding approaches for practical wireless systems. These approaches include variable-rate convolutional encoder, modified turbo decoder for local content in Single-Frequency Networks, and blind encoder parameter estimation for turbo codes. On the other hand, energy efficiency is major performance issue in wireless sensor networks. In this dissertation, we propose a novel hexagonal-tessellation based clustering and cluster-head selection scheme to maximize the lifetime of a wireless sensor network. For each proposed approach, the system performance evaluation is also provided. In this dissertation the reliability performance is expressed in terms of bit-error-rate (BER), and the energy efficiency is expressed in terms of network lifetime

Turbo NOC: a framework for the design of Network-on-Chip-basedturbo decoder architectures

This paper proposes a general framework for the design and simulation of network-on-chip-based turbo decoder architectures. Several parameters in the design space are investigated, namely, network topology, parallelism degree, the rate at which messages are sent by processing nodes over the network, and routing strategy. The main results of this analysis are as follows: 1) the most suited topologies to achieve high throughput with a limited complexity overhead are generalized de Bruijn and generalized Kautz topologies and 2) depending on the throughput requirements, different parallelism degrees, message injection rates, and routing algorithms can be used to minimize the network area overhead

Energy-efficient design and implementation of turbo codes for wireless sensor network

The objective of this thesis is to apply near Shannon limit Error-Correcting Codes (ECCs), particularly the turbo-like codes, to energy-constrained wireless devices, for the purpose of extending their lifetime. Conventionally, sophisticated ECCs are applied to applications, such as mobile telephone networks or satellite television networks, to facilitate long range and high throughput wireless communication. For low power applications, such as Wireless Sensor Networks (WSNs), these ECCs were considered due to their high decoder complexities. In particular, the energy efficiency of the sensor nodes in WSNs is one of the most important factors in their design. The processing energy consumption required by high complexity ECCs decoders is a significant drawback, which impacts upon the overall energy consumption of the system. However, as Integrated Circuit (IC) processing technology is scaled down, the processing energy consumed by hardware resources reduces exponentially. As a result, near Shannon limit ECCs have recently begun to be considered for use in WSNs to reduce the transmission energy consumption [1,2]. However, to ensure that the transmission energy consumption reduction granted by the employed ECC makes a positive improvement on the overall energy efficiency of the system, the processing energy consumption must still be carefully considered.The main subject of this thesis is to optimise the design of turbo codes at both an algorithmic and a hardware implementation level for WSN scenarios. The communication requirements of the target WSN applications, such as communication distance, channel throughput, network scale, transmission frequency, network topology, etc, are investigated. Those requirements are important factors for designing a channel coding system. Especially when energy resources are limited, the trade-off between the requirements placed on different parameters must be carefully considered, in order to minimise the overall energy consumption. Moreover, based on this investigation, the advantages of employing near Shannon limit ECCs in WSNs are discussed. Low complexity and energy-efficient hardware implementations of the ECC decoders are essential for the target applications

Récepteur itératif pour les systèmes MIMO-OFDM basé sur le décodage sphérique : convergence, performance et complexité

Recently, iterative processing has been widely considered to achieve near-capacity performance and reliable high data rate transmission, for future wireless communication systems. However, such an iterative processing poses significant challenges for efficient receiver design. In this thesis, iterative receiver combining multiple-input multiple-output (MIMO) detection with channel decoding is investigated for high data rate transmission. The convergence, the performance and the computational complexity of the iterative receiver for MIMO-OFDM system are considered. First, we review the most relevant hard-output and soft-output MIMO detection algorithms based on sphere decoding, K-Best decoding, and interference cancellation. Consequently, a low-complexity K-best (LCK- Best) based decoder is proposed in order to substantially reduce the computational complexity without significant performance degradation. We then analyze the convergence behaviors of combining these detection algorithms with various forward error correction codes, namely LTE turbo decoder and LDPC decoder with the help of Extrinsic Information Transfer (EXIT) charts. Based on this analysis, a new scheduling order of the required inner and outer iterations is suggested. The performance of the proposed receiver is evaluated in various LTE channel environments, and compared with other MIMO detection schemes. Secondly, the computational complexity of the iterative receiver with different channel coding techniques is evaluated and compared for different modulation orders and coding rates. Simulation results show that our proposed approaches achieve near optimal performance but more importantly it can substantially reduce the computational complexity of the system. From a practical point of view, fixed-point representation is usually used in order to reduce the hardware costs in terms of area, power consumption and execution time. Therefore, we present efficient fixed point arithmetic of the proposed iterative receiver based on LC-KBest decoder. Additionally, the impact of the channel estimation on the system performance is studied. The proposed iterative receiver is tested in a real-time environment using the MIMO WARP platform.Pour permettre l’accroissement de débit et de robustesse dans les futurs systèmes de communication sans fil, les processus itératifs sont de plus considérés dans les récepteurs. Cependant, l’adoption d’un traitement itératif pose des défis importants dans la conception du récepteur. Dans cette thèse, un récepteur itératif combinant les techniques de détection multi-antennes avec le décodage de canal est étudié. Trois aspects sont considérés dans un contexte MIMOOFDM: la convergence, la performance et la complexité du récepteur. Dans un premier temps, nous étudions les différents algorithmes de détection MIMO à décision dure et souple basés sur l’égalisation, le décodage sphérique, le décodage K-Best et l’annulation d’interférence. Un décodeur K-best de faible complexité (LC-K-Best) est proposé pour réduire la complexité sans dégradation significative des performances. Nous analysons ensuite la convergence de la combinaison de ces algorithmes de détection avec différentes techniques de codage de canal, notamment le décodeur turbo et le décodeur LDPC en utilisant le diagramme EXIT. En se basant sur cette analyse, un nouvel ordonnancement des itérations internes et externes nécessaires est proposé. Les performances du récepteur ainsi proposé sont évaluées dans différents modèles de canal LTE, et comparées avec différentes techniques de détection MIMO. Ensuite, la complexité des récepteurs itératifs avec différentes techniques de codage de canal est étudiée et comparée pour différents modulations et rendement de code. Les résultats de simulation montrent que les approches proposées offrent un bon compromis entre performance et complexité. D’un point de vue implémentation, la représentation en virgule fixe est généralement utilisée afin de réduire les coûts en termes de surface, de consommation d’énergie et de temps d’exécution. Nous présentons ainsi une représentation en virgule fixe du récepteur itératif proposé basé sur le décodeur LC K-Best. En outre, nous étudions l’impact de l’estimation de canal sur la performance du système. Finalement, le récepteur MIMOOFDM itératif est testé sur la plateforme matérielle WARP, validant le schéma proposé