Characterization and mapping of crystal defects in silicon carbide

Silicon carbide (SiC) is a semiconductor with attractive properties, such as a wide bandgap (3. 26 eV), high dielectric strength, and high thermal conductivity that make it suitable for high power, highspeed electronic devices. A major roadblock to its wider application is the presence of defects, particularly micropipes and dislocations, in SiC wafers produced today and decreasing density of these defects is the most important challenge of the industry. The goal of this thesis was to design, build and test a system for detection and analysis of the defects in SiC wafers. The system is based on the reflection optical microscopy of the surface of wafers etched with Potassium Hydroxide (KOH). Etching in molten KOH at 450ºC enhances the defects and allows distinguishing micropipes and dislocation in dark field or bright field microscopic images, depending on the semiconductor doping level. Computer image analysis of the microscopic images, which included threshold filtering, dilation, and erosion, resulted in creation of wafer maps of micropipes and dislocation defects. The process was automated and the duration for scanning wafers, 5 cm in diameter, and generating defect maps is typically four hours. The ability to generate defect maps of SiC wafers will help to reveal the conditions under which micropipes are formed, and may ultimately lead to developing methods of their reduction. Since there is a well established theory that screw dislocations play a role in the generation of micropipes, the correlation between micropipes and dislocations maps will further help to confirm this hypothesis

Formation and Characterization of Columnar Porous SiC Fabricated by Photo-electrochemical Etching

The major part of this work concentrates on the details of the physical aspects of the columnar pore formation in the Si-face (0001), the C-face (000-1), and the a-face (11-20) of n-type 4H and 6H SiC samples using photoelectrochemical etching. The electrochemical etching of p-type 4H and 6H crystals is also illustrated. In Si-face n-type 4H and 6H SiC, the columnar pores are about one ¦Ìm in diameter. The formed porous layer is of high porosity and thus fragile. The formation of a hybrid partial columnar porous structure to improve the mechanical strength is discussed in detail. Nano-columnar pores are successfully fabricated in C-face n-type 4H and 6H SiC. The self-organized columnar pores have diameters of about 20 nm. The interpore spacing from center to center is between 40-60 nm depending on the etching conditions. The porous layer can be as thick as 200 ¦Ìm. The porosity of the porous structure is about 0.1. Systematic studies on the experimental control parameters, such as voltage, reaction temperature, surface roughness, HF concentration, and doping concentration, have been performed and are explained in detail. The formation mechanisms are discussed extensively based on crystallographic aspects, diffusion limited aggregation, impedance spectroscopy, voltammetry, equivalent circuits, and semiconductor/electrolyte interface (similar to a Schottky semiconductor/metal interface) electrochemistry. The 20 nm diameter nano-columnar pore formation has also been observed on the a-face n-type 6H SiC. The experimental observations are recorded and the voltage effects on the formed porous structure are discussed. In the electrochemical etching of p-type 4H and 6H SiC, the electrochemical polishing, porosity dependence on the current density, porosity variation during the etching and doping effects on the porous formation are discussed. The five appendices contain information about: (1) my publication list, (2) technical notes about the fabrication of porous SiC, (3) technical notes about the fabrication of porous Al2O3, (4) operation procedures and technical notes about the mechanical polishing of SiC, and (5) operation procedures and technical notes about the Varian 936-60 Leak Detector and the E-beam Evaporator in our laboratory

An atomistic investigation on the nanometric cutting mechanism of hard, brittle materials

The demand for ultra precision machined devices and components is growing at a rapid pace in various areas such as the aerospace, energy, optical, electronics and bio-medical industries. Because of their outstanding engineering properties such as high refractive index, wide energy bandgap and low mass density, there is a continuing requirement for developments in manufacturing methods for hard, brittle materials. Accordingly, an assessment of the nanometric cutting of the optical materials silicon and silicon carbide (SiC), which are ostensibly hard and brittle, has been undertaken. Using an approach of parallel molecular dynamics simulations with a three-body potential energy function combined with experimental characterization, this thesis provides a quantitative understanding of the ductile-regime machining of silicon and SiC (polytypes: 3C, 4H and 6H SiC), and the mechanism by which a diamond tool wears during the process. The distinctive MD algorithm developed in this work provides a comprehensive analysis of thermal effects, high pressure phase transformation, tool wear (both chemical and abrasive), influence of crystal anisotropy, cutting forces and machining stresses (hydrostatic and von Mises), hitherto not done so far. The calculated stress state in the cutting zone during nanometric cutting of single crystal silicon indicated Herzfeld–Mott transition (metallization) due to high pressure phase transformation (HPPT) of silicon under the influence of deviatoric stress conditions. Consequently, the transformation of pristine silicon to β-silicon (Si-II) was found to be the likely reason for the observed ductility of bulk silicon during its nanoscale cutting. Tribochemical formation of silicon carbide through a solid state single phase reaction between the diamond tool and silicon workpiece in tandem with sp3-sp2 disorder of carbon atoms from the diamond tool up to a cutting temperature of 959 K has been suggested as the most likely mechanism through which a diamond cutting tool wears while cutting silicon. The recently developed dislocation extraction algorithm (DXA) was employed to detect the nucleation of dislocations in the MD simulations of varying cutting orientation and cutting direction. Interestingly, despite of being a compound of silicon and carbon, silicon carbide (SiC) exhibited characteristics more like diamond, e.g. both SiC iii workpiece and diamond cutting tool were found to undergo sp3-sp2 transition during the nanometric cutting of single crystal SiC. Also, cleavage was found to be the dominant mechanism of material removal on the (111) crystal orientation. Based on the overall analysis, it was found that 3C-SiC offers ease of deformation on either (111) , (110) or (100) setups. The simulated orthogonal components of thrust force in 3C-SiC showed a variation of up to 45% while the resultant cutting forces showed a variation of 37% suggesting that 3C-SiC is anisotropic in its ease of deformation. The simulation results for three major polytypes of SiC and for silicon indicated that 4H-SiC would produce the best sub-surface integrity followed by 3C-SiC, silicon and 6H-SiC. While, silicon and SiC were found to undergo HPPT which governs the ductility in these hard, brittle materials, corresponding evidence of HPPT during the SPDT of polycrystalline reaction bonded SiC (RB-SiC) was not observed. It was found that, since the grain orientation changes from one crystal to another in polycrystalline SiC, the cutting tool experiences work material with different crystallographic orientations and directions of cutting. Thus, some of the grain boundaries cause the individual grains to slide along the easy cleavage direction. Consequently, the cutting chips in RB-SiC are not deformed by plastic mechanisms alone, but rather a combination of phase transformation at the grain boundaries and cleavage of the grains both proceed in tandem. Also, the specific-cutting energy required to machine polycrystalline SiC was found to be lower than that required to machine single crystal SiC. Correspondingly, a relatively inferior machined surface finish is expected with a polycrystalline SiC. Based on the simulation model developed, a novel method has been proposed for the quantitative assessment of tool wear from the MD simulations. This model can be utilized for the comparison of tool wear for various simulation studies concerning graphitization of diamond tools. Finally, based on the theoretical simulation results, a novel method of machining is proposed to suppress tool wear and to obtain a better quality of the machined surface during machining of difficult-to-machine materials

Analysis of defect structure in silicon. Silicon sheet growth development for the large area silicon sheet task of the Low-Cost Solar array Project

One hundred ninety-three silicon sheet samples, approximately 880 square centimeters, were analyzed for twin boundary density, dislocation pit density, and grain boundary length. One hundred fifteen of these samples were manufactured by a heat exchanger method, thirty-eight by edge defined film fed growth, twenty-three by the silicon on ceramics process, and ten by the dendritic web process. Seven solar cells were also step-etched to determine the internal defect distribution on these samples. Procedures were developed or the quantitative characterization of structural defects such as dislocation pits, precipitates, twin & grain boundaries using a QTM 720 quantitative image analyzing system interfaced with a PDP 11/03 mini computer. Characterization of the grain boundary length per unit area for polycrystalline samples was done by using the intercept method on an Olympus HBM Microscope

Silicon carbide process development for microengine applications : residual stress control and microfabrication

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2004.Includes bibliographical references.The high power densities expected for the MIT microengine (silicon MEMS-based micro-gas turbine generator) require the turbine and compressor spool to rotate at a very high speed at elevated temperatures (1300 to 1700 K). However, the thermal softening of silicon (Si) at temperatures above 900 K limits the highest achievable operating temperatures, which in turn significantly compromises the engine efficiency. Silicon carbide (SiC) offers great potential for improved microengine efficiency due to its high stiffness, strength, and resistance to oxidation at elevated temperatures. However, techniques for microfabricating SiC to the high level of precision needed for the microengine are not currently available. Given the limitations imposed by the SiC microfabrication difficulties, this thesis proposed Si-SiC hybrid turbine structures, explores key process steps, identified, and resolved critical problems in each of the processes along with a thorough characterization of the microstructures, mechanical properties, and composition of CVD SiC. Three key process steps for the Si-SiC hybrid structures are CVD SiC deposition on silicon wafers, wafer-level SiC planarization, and Si-to-SiC wafer bonding. Residual stress control in SiC coatings is of the most critical importance to the CVD process itself as well as to the subsequent wafer planarization, and bonding processes since residual stress-induced wafer bow increases the likelihood of wafer cracking significantly. Based on CVD parametric studies performed to determine the relationship between residual stresses in SiC and H2/MTS ratio, deposition temperature, and HCl/MTS ratio, very low residual stress (less than several tens of MPa) in thick CVD SiC coatings (up to -50 pm) was achieved.(cont.) In the course of the residual stress study, a general method for stress quantification was developed to isolate the intrinsic stress from the thermal stress. In addition, qualitative explanations for the residual stress generation are also offered, which are in good agreement with experimental results. In the post-CVD processes, the feasibility of SiC wafer planarization and Si-to-SiC wafer bonding processes have successfully been demonstrated, where CVD oxide was used as an interlayer bonding material to overcome the roughness of SiC surface. Finally, the bonding interface of the Si-SiC hybrid structures with oxide interlayer was verified to retain its integrity at high temperatures through four-point flexural tests.by Dongwon Choi.Ph.D

High efficient polishing of sliced 4H-SiC (0001) by molten KOH etching

Single-crystal silicon carbide (4H-SiC) is a promising third-generation semiconductor material because of its excellent electrical, mechanical and chemical properties. However, the high hardness of 4H-SiC makes it a typical difficult-to-machine material, which greatly restricts the development of SiC devices. In this work, molten KOH etching was first used to polish SiC. The perfect crystal surface and dislocation spots were studied separately. For the perfect crystal surface, a typical isotropic etching polishing behavior was observed. The speed of the polishing process was closely correlated with the temperature. An ultrafast polishing of sliced SiC was achieved, reducing the roughness from 246.5 nm to 16.06 nm within 2 min at 800 °C, and all subsurface damage was removed, as demonstrated by TEM. For the dislocation spot, a relationship between the etch pits angle and temperature was found, making it possible to remove the influence of the dislocation spot by increasing the etch pits angle to approach 180°. This study shows that molten KOH etching could be a very promising SiC polishing method and deserves further research. We anticipate that this approach will be applicable to ultrafast polishing of SiC at the industrial scale

Synthesis of Quasi-Freestanding Graphene Films Using Radical Species Formed in Cold Plasmas

For over a decade, the Stinespring laboratory has investigated scalable, plasma assisted synthesis (PAS) methods for the growth of graphene films on silicon carbide (SiC). These typically utilized CF4-based inductively coupled plasma (ICP) with reactive ion etching (RIE) to selectively etch silicon from the SiC lattice. This yielded a halogenated carbon-rich surface layer which was then annealed to produce the graphene layers. The thickness of the films was controlled by the plasma parameters, and overall, the process was readily scalable to the diameter of the SiC wafer. The PAS process reproducibly yielded two- to three-layer thick graphene films that were highly tethered to the underlying SiC substrate via an intermediate buffer layer. The buffer layer was compositionally similar to graphene. However, a significant number of graphene carbons were covalently bound to silicon atoms in the underlying substrate. This tethering lead to mixing of the film and substrate energy bands which degraded many of graphene’s most desirable electrical properties. The research described in this dissertation was aimed at improving graphene quality by reducing the extent of tethering using a fundamentally different plasma etching mechanism while maintaining scalability. In the ICP-RIE process, the etchant species include F and CFx (x = 1-3) radicals and their corresponding positive ions. These radicals are classified as “cold plasma species” in the sense that they are nominally in thermal equilibrium with the substrate and walls of the system. In contrast, the electrons exist at extremely high temperature (energy), and the ionic species are accelerated to energies on the order of several hundred electron volts by the plasma bias voltage that exists between the plasma and substrate. As a result, the ionic species create a directional, high rate etch that is dominated by physical etching characterized by energy and momentum transfer. In contrast, the neutral radicals chemically etch the surface at a much lower rate. In this work, the effects of physical etching due to high energy ions were eliminated by shielding the SiC substrate using a mask (e.g., quartz) supported by silicon posts. In this way, a microplasma consisting of chemically reactive cold plasma species was created in the small space between the substrate surface and the backside of the quartz mask. This process, referred to here as microplasma assisted synthesis (MPAS), was used to produce graphene films. A parametric investigation was conducted to determine the influence of MPAS operating parameters on graphene quality. The key parameters investigated included ICP power, RIE power, etch time, various mask materials, microreactor height, substrate cooling, initial surface morphology and SiC polytype. The resulting graphene films were characterized by x-ray photoelectron spectroscopy (XPS), Raman spectroscopy, and atomic force microscopy (AFM). Following optimization of the MPAS process, some tethering of the graphene films remained. However, films produced by MPAS consistently exhibited significantly less tethering than those produced using the PAS process. Moreover, both XPS and Raman spectroscopy indicated that these films were quasi-free standing, and, in some cases, they approached free standing graphene. From a wide view, the results of these studies demonstrate the potential of MPAS as a technique for realizing the controlled synthesis of high-quality, lightly tethered mono-, and few-layer graphene films directly on an insulating substrate. On a more fundamental level, the results of these studies provide insight into the surface chemistry of radical species

単結晶SiCの放電加工システムの開発

学位の種別: 課程博士審査委員会委員 : (主査)東京大学教授 国枝 正典, 東京大学教授 横井 秀俊, 東京大学教授 金 範埈, 東京大学准教授 山本 晃生, 名古屋工業大学准教授 早川 伸哉University of Tokyo(東京大学