19,057 research outputs found

    System-on-chip Computing and Interconnection Architectures for Telecommunications and Signal Processing

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    This dissertation proposes novel architectures and design techniques targeting SoC building blocks for telecommunications and signal processing applications. Hardware implementation of Low-Density Parity-Check decoders is approached at both the algorithmic and the architecture level. Low-Density Parity-Check codes are a promising coding scheme for future communication standards due to their outstanding error correction performance. This work proposes a methodology for analyzing effects of finite precision arithmetic on error correction performance and hardware complexity. The methodology is throughout employed for co-designing the decoder. First, a low-complexity check node based on the P-output decoding principle is designed and characterized on a CMOS standard-cells library. Results demonstrate implementation loss below 0.2 dB down to BER of 10^{-8} and a saving in complexity up to 59% with respect to other works in recent literature. High-throughput and low-latency issues are addressed with modified single-phase decoding schedules. A new "memory-aware" schedule is proposed requiring down to 20% of memory with respect to the traditional two-phase flooding decoding. Additionally, throughput is doubled and logic complexity reduced of 12%. These advantages are traded-off with error correction performance, thus making the solution attractive only for long codes, as those adopted in the DVB-S2 standard. The "layered decoding" principle is extended to those codes not specifically conceived for this technique. Proposed architectures exhibit complexity savings in the order of 40% for both area and power consumption figures, while implementation loss is smaller than 0.05 dB. Most modern communication standards employ Orthogonal Frequency Division Multiplexing as part of their physical layer. The core of OFDM is the Fast Fourier Transform and its inverse in charge of symbols (de)modulation. Requirements on throughput and energy efficiency call for FFT hardware implementation, while ubiquity of FFT suggests the design of parametric, re-configurable and re-usable IP hardware macrocells. In this context, this thesis describes an FFT/IFFT core compiler particularly suited for implementation of OFDM communication systems. The tool employs an accuracy-driven configuration engine which automatically profiles the internal arithmetic and generates a core with minimum operands bit-width and thus minimum circuit complexity. The engine performs a closed-loop optimization over three different internal arithmetic models (fixed-point, block floating-point and convergent block floating-point) using the numerical accuracy budget given by the user as a reference point. The flexibility and re-usability of the proposed macrocell are illustrated through several case studies which encompass all current state-of-the-art OFDM communications standards (WLAN, WMAN, xDSL, DVB-T/H, DAB and UWB). Implementations results are presented for two deep sub-micron standard-cells libraries (65 and 90 nm) and commercially available FPGA devices. Compared with other FFT core compilers, the proposed environment produces macrocells with lower circuit complexity and same system level performance (throughput, transform size and numerical accuracy). The final part of this dissertation focuses on the Network-on-Chip design paradigm whose goal is building scalable communication infrastructures connecting hundreds of core. A low-complexity link architecture for mesochronous on-chip communication is discussed. The link enables skew constraint looseness in the clock tree synthesis, frequency speed-up, power consumption reduction and faster back-end turnarounds. The proposed architecture reaches a maximum clock frequency of 1 GHz on 65 nm low-leakage CMOS standard-cells library. In a complex test case with a full-blown NoC infrastructure, the link overhead is only 3% of chip area and 0.5% of leakage power consumption. Finally, a new methodology, named metacoding, is proposed. Metacoding generates correct-by-construction technology independent RTL codebases for NoC building blocks. The RTL coding phase is abstracted and modeled with an Object Oriented framework, integrated within a commercial tool for IP packaging (Synopsys CoreTools suite). Compared with traditional coding styles based on pre-processor directives, metacoding produces 65% smaller codebases and reduces the configurations to verify up to three orders of magnitude

    Two- and Three-dimensional High Performance, Patterned Overlay Multi-chip Module Technology

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    A two- and three-dimensional multi-chip module technology was developed in response to the continuum in demand for increased performance in electronic systems, as well as the desire to reduce the size, weight, and power of space systems. Though developed to satisfy the needs of military programs, such as the Strategic Defense Initiative Organization, the technology, referred to as High Density Interconnect, can also be advantageously exploited for a wide variety of commercial applications, ranging from computer workstations to instrumentation and microwave telecommunications. The robustness of the technology, as well as its high performance, make this generality in application possible. More encouraging is the possibility of this technology for achieving low cost through high volume usage

    Communication Subsystems for Emerging Wireless Technologies

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    The paper describes a multi-disciplinary design of modern communication systems. The design starts with the analysis of a system in order to define requirements on its individual components. The design exploits proper models of communication channels to adapt the systems to expected transmission conditions. Input filtering of signals both in the frequency domain and in the spatial domain is ensured by a properly designed antenna. Further signal processing (amplification and further filtering) is done by electronics circuits. Finally, signal processing techniques are applied to yield information about current properties of frequency spectrum and to distribute the transmission over free subcarrier channels

    An assessment of technology alternatives for telecommunications and information management for the space exploration initiative

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    On the 20th anniversary of the Apollo 11 lunar landing, President Bush set forth ambitious goals for expanding human presence in the solar system. The Space Exploration Initiative (SEI) addresses these goals beginning with Space Station Freedom, followed by a permanent return to the Moon, and a manned mission to Mars. A well designed, adaptive Telecommunications, Navigation, and Information Management (TNIM) infrastructure is vital to the success of these missions. Utilizing initial projections of user requirements, a team under the direction of NASA's Office of Space Operations developed overall architectures and point designs to implement the TNIM functions for the Lunar and Mars mission scenarios. Based on these designs, an assessment of technology alternatives for the telecommunications and information management functions was performed. This technology assessment identifies technology developments necessary to meet the telecommunications and information management system requirements for SEI. Technology requirements, technology needs and alternatives, the present level of technology readiness in each area, and a schedule for development are presented

    ISDN at NASA Lewis Research Center

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    An expository investigation of the potential impact of the Integrated Services Digital Network (ISDN) at NASA Lewis Research Center is described. To properly frame the subject, the paper contains a detailed survey of the components of Narrowband ISDN. The principles and objectives are presented as decreed by the Consultative Committee for International Telephone and Telegraph (CCITT). The various channel types are delineated and their associated service combinations are described. The subscriber-access network functions are explained pictorially via the ISDN reference configuration. A section on switching techniques is presented to enable the reader to understand the emergence of the concept of fast packet switching. This new technology is designed to operate over the high bandwidth, low error rate transmission media that characterizes the LeRC environment. A brief introduction to the next generation of networks is covered with sections on Broadband ISDM (B-ISDN), Asynchronous Transfer Mode (ATM), and Synchronous Optical Networks (SONET). Applications at LeRC are presented, first in terms of targets of opportunity, then in light of compatibility constraints. In-place pilot projects and testing are described that demonstrate actual usage at LeRC

    In-flight maintenance study Final report

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    Sample system analysis, MF requirements, redesign, and packaging desig

    Application of advanced on-board processing concepts to future satellite communications systems: Bibliography

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    Abstracts are presented of a literature survey of reports concerning the application of signal processing concepts. Approximately 300 references are included

    NASA and the challenge of ISDN: The role of satellites in an ISDN world

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    To understand what role satellites may play in Integrated Services Digital Network (ISDN), it is necessary to understand the concept of ISDN, including key organizations involved, the current status of key standards recommendations, and domestic and international progress implementation of ISDN. Each of these areas are explained. A summary of the technical performance criteria for ISDN, current standards for satellites in ISDN, key players in the ISDN environment, and what steps can be taken to encourage application of satellites in ISDN are also covered

    Deep Space Network information system architecture study

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    The purpose of this article is to describe an architecture for the Deep Space Network (DSN) information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990s. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies, such as the following: computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control
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