Pixel Detectors for Charged Particles

Pixel Detectors, as the current technology of choice for the innermost vertex detection, have reached a stage at which large detectors have been built for the LHC experiments and a new era of developments, both for hybrid and for monolithic or semi-monolithic pixel detectors is in full swing. This is largely driven by the requirements of the upgrade programme for the superLHC and by other collider experiments which plan to use monolithic pixel detectors for the first time. A review on current pixel detector developments for particle tracking and vertexing is given, comprising hybrid pixel detectors for superLHC with its own challenges in radiation and rate, as well as on monolithic, so-called active pixel detectors, including MAPS and DEPFET pixels for RHIC and superBelle.Comment: 19 pages, 23 drawings in 14 figure

Electronics for Pixel Detectors

Most modern HEP experiments use pixel detectors for vertex finding because these detectors provide clean and unambiguous position information even in a high multiplicity environment. At LHC three of the four main experiments will use pixel vertex detectors. There is also a strong development effort in the US centred around the proposed BTeV experiment. The chips being developed for these detectors will be discussed giving particular attention to the architectural choices of the various groups. Radiation tolerant deep sub-micron CMOS is used in most cases. In light of predicted developments in the semiconductor industry and bearing in mind some fundamental limits it is possible to foresee the trends in pixel detector design for future experiments. I

Integrated Circuit Design in US High-Energy Physics

This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies; Outlook of future technologies including 2.5D and 3D; Survey of ICs used in current experiments and ICs targeted for approved or proposed experiments; IC design at US institutes and recommendations for collaboration in the future