73 research outputs found
Deterministic Rateless Codes for BSC
A rateless code encodes a finite length information word into an infinitely
long codeword such that longer prefixes of the codeword can tolerate a larger
fraction of errors. A rateless code achieves capacity for a family of channels
if, for every channel in the family, reliable communication is obtained by a
prefix of the code whose rate is arbitrarily close to the channel's capacity.
As a result, a universal encoder can communicate over all channels in the
family while simultaneously achieving optimal communication overhead. In this
paper, we construct the first \emph{deterministic} rateless code for the binary
symmetric channel. Our code can be encoded and decoded in time per
bit and in almost logarithmic parallel time of , where
is any (arbitrarily slow) super-constant function. Furthermore, the error
probability of our code is almost exponentially small .
Previous rateless codes are probabilistic (i.e., based on code ensembles),
require polynomial time per bit for decoding, and have inferior asymptotic
error probabilities. Our main technical contribution is a constructive proof
for the existence of an infinite generating matrix that each of its prefixes
induce a weight distribution that approximates the expected weight distribution
of a random linear code
Spinal codes
Spinal codes are a new class of rateless codes that enable wireless networks to cope with time-varying channel conditions in a natural way, without requiring any explicit bit rate selection. The key idea in the code is the sequential application of a pseudo-random hash function to the message bits to produce a sequence of coded symbols for transmission. This encoding ensures that two input messages that differ in even one bit lead to very different coded sequences after the point at which they differ, providing good resilience to noise and bit errors. To decode spinal codes, this paper develops an approximate maximum-likelihood decoder, called the bubble decoder, which runs in time polynomial in the message size and achieves the Shannon capacity over both additive white Gaussian noise (AWGN) and binary symmetric channel (BSC) models. Experimental results obtained from a software implementation of a linear-time decoder show that spinal codes achieve higher throughput than fixed-rate LDPC codes, rateless Raptor codes, and the layered rateless coding approach of Strider, across a range of channel conditions and message sizes. An early hardware prototype that can decode at 10 Mbits/s in FPGA demonstrates that spinal codes are a practical construction.Massachusetts Institute of Technology (Irwin and Joan Jacobs Presidential Fellowship)Massachusetts Institute of Technology (Claude E. Shannon Assistantship)Intel Corporation (Intel Fellowship
On the Energy Efficiency of LT Codes in Proactive Wireless Sensor Networks
This paper presents an in-depth analysis on the energy efficiency of Luby
Transform (LT) codes with Frequency Shift Keying (FSK) modulation in a Wireless
Sensor Network (WSN) over Rayleigh fading channels with pathloss. We describe a
proactive system model according to a flexible duty-cycling mechanism utilized
in practical sensor apparatus. The present analysis is based on realistic
parameters including the effect of channel bandwidth used in the IEEE 802.15.4
standard, active mode duration and computation energy. A comprehensive
analysis, supported by some simulation studies on the probability mass function
of the LT code rate and coding gain, shows that among uncoded FSK and various
classical channel coding schemes, the optimized LT coded FSK is the most
energy-efficient scheme for distance d greater than the pre-determined
threshold level d_T , where the optimization is performed over coding and
modulation parameters. In addition, although the optimized uncoded FSK
outperforms coded schemes for d < d_T , the energy gap between LT coded and
uncoded FSK is negligible for d < d_T compared to the other coded schemes.
These results come from the flexibility of the LT code to adjust its rate to
suit instantaneous channel conditions, and suggest that LT codes are beneficial
in practical low-power WSNs with dynamic position sensor nodes.Comment: accepted for publication in IEEE Transactions on Signal Processin
Rateless Coding for Gaussian Channels
A rateless code-i.e., a rate-compatible family of codes-has the property that
codewords of the higher rate codes are prefixes of those of the lower rate
ones. A perfect family of such codes is one in which each of the codes in the
family is capacity-achieving. We show by construction that perfect rateless
codes with low-complexity decoding algorithms exist for additive white Gaussian
noise channels. Our construction involves the use of layered encoding and
successive decoding, together with repetition using time-varying layer weights.
As an illustration of our framework, we design a practical three-rate code
family. We further construct rich sets of near-perfect rateless codes within
our architecture that require either significantly fewer layers or lower
complexity than their perfect counterparts. Variations of the basic
construction are also developed, including one for time-varying channels in
which there is no a priori stochastic model.Comment: 18 page
Side-information Scalable Source Coding
The problem of side-information scalable (SI-scalable) source coding is
considered in this work, where the encoder constructs a progressive
description, such that the receiver with high quality side information will be
able to truncate the bitstream and reconstruct in the rate distortion sense,
while the receiver with low quality side information will have to receive
further data in order to decode. We provide inner and outer bounds for general
discrete memoryless sources. The achievable region is shown to be tight for the
case that either of the decoders requires a lossless reconstruction, as well as
the case with degraded deterministic distortion measures. Furthermore we show
that the gap between the achievable region and the outer bounds can be bounded
by a constant when square error distortion measure is used. The notion of
perfectly scalable coding is introduced as both the stages operate on the
Wyner-Ziv bound, and necessary and sufficient conditions are given for sources
satisfying a mild support condition. Using SI-scalable coding and successive
refinement Wyner-Ziv coding as basic building blocks, a complete
characterization is provided for the important quadratic Gaussian source with
multiple jointly Gaussian side-informations, where the side information quality
does not have to be monotonic along the scalable coding order. Partial result
is provided for the doubly symmetric binary source with Hamming distortion when
the worse side information is a constant, for which one of the outer bound is
strictly tighter than the other one.Comment: 35 pages, submitted to IEEE Transaction on Information Theor
Spinal codes
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from PDF student-submitted version of thesis.Includes bibliographical references (p. 52-55).Spinal codes are a new class of rateless codes that enable wireless networks to cope with time-varying channel conditions in a natural way, without requiring any explicit bit rate selection. The key idea in the code is the sequential application of a pseudo-random hash function to the message bits, to produce a sequence of coded symbols for transmission. This encoding ensures that two input messages that differ in even one bit lead to very different coded sequences after the point at which they differ, providing good resilience to noise and bit errors. To decode spinal codes, we develop an approximate maximum-likelihood decoder, called the bubble decoder, which runs in time polynomial in the message size and achieves the Shannon capacity over both additive white Gaussian noise (AWGN) and binary symmetric channel (BSC) models. The decoder trades off throughput for computation (hardware area or decoding time), allowing the decoder to scale gracefully with available hardware resources. Experimental results obtained from a software implementation of a linear-time decoder show that spinal codes achieve higher throughput than fixed-rate LDPC codes [11], rateless Raptor codes [35], and the layered rateless coding approach [8] of Strider [12], across a wide range of channel conditions and message sizes. An early hardware prototype that can decode at 10 Mbits/s in FPGA demonstrates that spinal codes are a practical construction.by Jonathan Perry.S.M
- …