Design of a 4.2-5.4 GHz Differential LC VCO using 0.35 m SiGe BiCMOS Technology

In this paper, a 4.2-5.4 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). Phase noise is -110.7 dBc/Hz at 1MHz offset from 5.4 GHz carrier frequency and -113.5 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained utilizing accumulation-mode varactors. Phase noise is relatively low due to taking the advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. The circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit occupies an area of 0.6 mm2 on Si substrate including RF and DC pads

Design of a tunable multi-band differential LC VCO using 0.35 mu m SiGe BiCMOS technology for multi-standard wireless communication systems

In this paper, an integrated 2.2-5.7GHz multi-band differential LC VCO for multi-standard wireless communication systems was designed utilizing 0.35 mu m SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together in the same circuit, is a novel approach for wideband VCOs. Based on the post-layout simulation results, the VCO can be tuned using a DC voltage of 0 to 3.3 V for 5 different frequency bands (2.27-2.51 GHz, 2.48-2.78 GHz, 3.22-3.53 GHz, 3.48-3.91 GHz and 4.528-5.7 GHz) with a maximum bandwidth of 1.36 GHz and a minimum bandwidth of 300 MHz. The designed and simulated VCO can generate a differential output power between 0.992 and -6.087 dBm with an average power consumption of 44.21 mW including the buffers. The average second and third harmonics level were obtained as -37.21 and -47.6 dBm, respectively. The phase noise between -110.45 and -122.5 dBc/Hz, that was simulated at 1 MHz offset, can be obtained through the frequency of interest. Additionally, the figure of merit (FOM), that includes all important parameters such as the phase noise, the power consumption and the ratio of the operating frequency to the offset frequency, is between -176.48 and -181.16 and comparable or better than the ones with the other current VCOs. The main advantage of this study in comparison with the other VCOs, is covering 5 frequency bands starting from 2.27 up to 5.76 GHz without FOM and area abandonment. Output power of the fundamental frequency changes between -6.087 and 0.992 dBm, depending on the bias conditions (operating bands). Based on the post-layout simulation results, the core VCO circuit draws a current between 2.4-6.3 mA and between 11.4 and 15.3 mA with the buffer circuit from 3.3 V supply. The circuit occupies an area of 1.477 mm(2) on Si substrate, including DC, digital and RF pads

Design of a 4.2-5.4 GHz differential LC VCO using 0.35 mu m SiGeBiCMOS technology for IEEE 802.11a applications

In this paper, a 4.2-5.4 GHz, -Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35 mu m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is -110.7 dBc/Hz at 1 MHz offset from 5.4 GHz carrier frequency and -113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low because of taking advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm(2) on Si substrate, including DC and RF pads

A 4.5-5.8 GHz Differential LC VCO using 0.35 m SiGe BiCMOS Technology

In this paper, design and realization of a 4.5-5.8 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is implemented with 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). A linear, 1300 MHz tuning range is measured with accumulation-mode varactors. Fundamental frequency output power changes between -1.6 dBm and 0.9 dBm, depending on the tuning voltage. The circuit draws 17 mA from 3.3 V supply, including buffer circuits leading to a total power dissipation of 56 mW. Post-layout phase noise is simulated -110.7 dBc/Hz at 1MHz offset from 5.8 GHz carrier frequency and -113.4 dBc/Hz from 4.5 GHz carrier frequency. Phase noise measurements will be updated in the final manuscript. The circuit occupies an area of 0.6 mm2 on Si substrate including RF and DC pads

Design and analysis of fully integrated differential VCOs

Oscillators play a decisive role for electronic equipment in many fields-like communication, navigation or data processing. Especially oscillators are key building blocks in integrated transceivers for wired and wireless communication systems. In this context the study of fully integrated differential VCOs has received attention. In this paper we present an analytic analysis of the steady state oscillation of integrated differential VCOs which is based on a nonlinear model of the oscillator. The outcomes of this are design formulas for the amplitude as well as the stability of the oscillator which take the nonlinearity of the circuit into account. © 2005 Copernicus GmbH

Minimum Phase noise of an LC oscillator: Determination of the optimal operating point of the active part

International audienceIn this paper, we describe an original method for determining the optimal operating point of the active part (transistor) of an LC oscillator leading to the minimum phase noise for given specifications in terms of power consumption, oscillation frequency and forgiven devices (i.e.,transistor and resonator). The key point of the proposed method is based on the use of a proper LC oscillator architecture providing a fixed loaded quality factor for different operating points of the active part within the oscillator. The feedback network of this architecture is made of an LC resonator with coupling transformers. In these conditions, we show that it is possible to easily change the operating point of the amplifier, through the determination of the turns ratio of those transformers, and observe its effect on phase noise without modifying the loaded quality factor of the resonator. The optimal operating point for minimum phase noise is then extracted from nonlinear simulations. Once this optimal behavior of the active part is known and by associating the previous LC resonator, a design of an LC oscillator or VCO with an optimal phase noise becomes possible. The conclusions of the presented simulation results have been widely used to design and implement a fully integrated LC differential VCO on a 0.35µm BiCMOS SiGe process

A design approach for integrated CMOS LC-tank oscillators using bifurcation analysis

Electrical oscillators play a decisive role in integrated transceivers for wired and wireless communication systems. In this context the study of fully integrated differential VCOs has received attention. In this paper formulas for investigations of the stability as well as the amplitude of CMOS LC tank oscillators are derived, where an overall model of nonlinear gain elements is used. By means of these results we are able to present an improved design approach which gives a deeper insight into the functionality of LC tank VCOs

Design of VCOs in Deep Sub-micron Technologies

This work will present a more accurate frequency prediction model for single-ended ring oscillators (ROs), a case-study comparing different ROs, and a design method for LC voltage-controlled oscillators (LCVCOs) that uses a MATLAB script based on analytical equations to output a graphical design space showing performance characteristics as a function of design parameters. Using this method, design trade-offs become clear, and the designer can choose which performance characteristics to optimize. These methods were used to design various topologies of ring oscillators and LCVCOs in the GlobalFoundries 28 nm HPP CMOS technology, comparing the performance between different topologies based on simulation results. The results from the MATLAB design script were compared to simulation results as well to show the effectiveness of the design methods. Three varieties of 5 GHz voltage controlled ring oscillators were designed in the GlobalFoundries 28 nm HPP CMOS technology. The first is a low current low dropout regulator (LDO) tuned ring oscillator designed with thin oxide devices and a 0.85 V supply. The second is a high current LDO-tuned ring oscillator designed with medium oxide devices and a 1.5 V supply. The third is varactor-tuned ring oscillator with no LDO, and 0.85 V supply. Performance comparison of these ring oscillator systems are presented, outlining trade-offs between tuning range, phase noise, power dissipation, and area. The varactor-tuned ring oscillator exhibits 8.89 dBc/Hz (with power supply noise) and 16.27 dBc/Hz (without power supply noise) improvement in phase noise over the best-performing LDO-tuned ring oscillator. There are advantages in average power dissipation and area for a minimal tradeoff in tuning range with the varactor-tuned ring oscillator. Four multi-GHz LCVCOs were designed in the GlobalFoundries 28 nm HPP CMOS technology: 15 GHz varactor-tuned NMOS-only, 9 GHz varactor-tuned self-biased CMOS, 14.2 GHz digitally-tuned NMOS-only, and 8.2 GHz digitally-tuned self-biased CMOS. As a design method, analytical ex-pressions describing tuning range, tank amplitude constraint, and startup condition were used in MATLAB to output a graphical view of the design space for both NMOS-only and CMOS LCVCOs, with maximum varactor capacitance on the y-axis and NMOS transistor width on the x-axis. Phase noise was predicted as well. In addition to the standard varactor control voltage tuning method, digitally-tuned implementations of both NMOS and CMOS LCVCOs are presented. The performance aspects of all designed LCVCOs are compared. Both varactor-tuned and digitally-tuned NMOS LCVCOs have lower phase noise, lower power consumption, and higher tuning range than both CMOS topologies. The varactor-tuned NMOS LCVCO has the lowest phase noise of -97 dBc/Hz at 1 MHz offset from 15 GHz center frequency, FOM of -172.20 dBc/Hz, and FOMT of -167.76 dBc/Hz. The digitally-tuned CMOS LCVCO has the greatest tuning range at 10%. Phase noise is improved by 3 dBc/Hz with the digitally-tuned CMOS topology over varactor-tuned CMOS

High Speed CMOS VCO For Advanced Communications [TK7871.99.M99 C435 2003 f rb][Microfiche 7271].

Peningkatan keperluan bagi komunikasi tanpa wayar dalam suara dan data telah memotivasikan kerja-kerja untuk meningkatkan tahap intregrasi dalam pemancar-penerima berfrekuensi radio (RF) baru-baru ini. The fast growing demand of wireless communications for voice and data has driven recent efforts to dramatically increase the level of integration in RF transceivers

Validation of Colpitts Vco Design for Two Way Portable Radio Applications

Pengayun Terkawal Voltan, VCO merupakan salah satu aspek penting bagi blok binaan aplikasi komunikasi moden yang berwayar dan tidak berwayar dalam era komunikasi kini. Jelasnya, pengayun ini sentiasa dianggap sebagai nadi penting dalam komunikasi radio dua hala yang kini di dapati di pasaran (Scalpi, 2008). Usaha untuk menghasilkan reka bentuk VCO yang terbaik telah dijalankan secara intensif dan berterusan dari penemuannya hingga kini. Halangan yang paling mencabar adalah untuk mencari jalan penyelesaian dalam pengesahan rekabentuk pengayun terkawal voltan yang terbaik, teguh dan kos efektif selaras dengan permintaan pasaran semasa. Kajian ini memaparkan cara yang terbaik untuk megesahkan rekabentuk sistem pengayun terrkawal voltan yang mengunakan kaedah Colpitts supaya ianya cekap dan mantap. Penyelidikan ini juga menbincangkan aspek-aspek lain yang merupakan elemen penting yang memerlukan perhatian yang mendalam terhadap alat alat komunikasi seperti radio dua hala bagi memastikan rekabentuk VCO yang cekap dan teguh. ________________________________________________________________________________________________________________________ The Voltage Controlled Oscillation, VCO is one of the most important building blocks in modern communication applications such as the wired and wireless communications devices. The oscillator is always been regarded as the ‘heart’ of a two way radio communication devices currently available in the market (Scalpi, 2008). Along the years major effort to produce the best VCO design have been carried out intensively and progressively. The challenge is to find a solution in validating a design that is robust and efficient yet cost effective VCO design in par with the current market demands. This research highlights the best possible ways to validate a VCO design which is using the Colpitts VCO design topology. This validation proves that the VCO design is a robust and efficient. This research also discusses about the key areas that requires proper attention during the design of a VCO design for a two way radio communication devices to ensure that the design is robust and efficient