Efficient Association of Low and High RF Power Rectifiers for Powering Ultra-Low Power Devices

International audienceNowadays, the efficiency of Radio Frequency (RF) energy harvesting circuits is continuously increasing and, at the same time, the energy consumption of connected devices is drastically decreasing. Despite that, collecting, storing and delivering such kind of harvested energy to the device in an appropriate manner is still a challenge. This paper presents the design of a harvester able to efficiently collect energy from both low and high power levels of the RF field. The objective is to correctly power supply an ultra-low power consumption device requiring a regulated voltage. A RF harvester circuit, specially designed for our application and consisting in the association of a low and a high level power rectifier, is presented. By the means of a circulator and depending on the RF power level received at the input port of the RF harvester circuit, the RF power is absorbed by the low power rectifier or reflected to the high power rectifier. The rectifiers have their outputs associated in series. At a frequency of 868 MHz, the efficiencies of the association of rectifiers are 43 % and 76 % and were obtained for input powers of-20 dBm and 0 dBm respectively

Recent advances in passive UHF-RFID tag antenna design for improved read range in product packaging applications: a comprehensive review

Radio frequency identification (RFID) is a rapidly developing technology, and RFID sensors have become important components in many common technology applications. The passive ultra-high frequency (UHF) tags used in RFID sensors have a higher data transfer rate and longer read range and usually come in unique small and portable application designs. However, these tags suffer from significant frequency interference when mounted on metallic materials or placed near liquid surfaces. This paper presents the recent advancements made in passive UHF-RFID tag designs proposed to resolve the interference problems. We focus on those designs that are intended to improve antenna read range as well as scalability designs for miniaturized application

Electronic Nanodevices

The start of high-volume production of field-effect transistors with a feature size below 100 nm at the end of the 20th century signaled the transition from microelectronics to nanoelectronics. Since then, downscaling in the semiconductor industry has continued until the recent development of sub-10 nm technologies. The new phenomena and issues as well as the technological challenges of the fabrication and manipulation at the nanoscale have spurred an intense theoretical and experimental research activity. New device structures, operating principles, materials, and measurement techniques have emerged, and new approaches to electronic transport and device modeling have become necessary. Examples are the introduction of vertical MOSFETs in addition to the planar ones to enable the multi-gate approach as well as the development of new tunneling, high-electron mobility, and single-electron devices. The search for new materials such as nanowires, nanotubes, and 2D materials for the transistor channel, dielectrics, and interconnects has been part of the process. New electronic devices, often consisting of nanoscale heterojunctions, have been developed for light emission, transmission, and detection in optoelectronic and photonic systems, as well for new chemical, biological, and environmental sensors. This Special Issue focuses on the design, fabrication, modeling, and demonstration of nanodevices for electronic, optoelectronic, and sensing applications

Design of rectenna series-association circuits for radio frequency energy harvesting in CMOS FD-SOI 28 nm

International audienceSeries-connected rectenna associations are proposed to improve the harvesting performance of conventional rectenna circuits by recovering power from different directions. With an available input power of -20 dBm, post-layout simulations evaluated the total output power of four series-connected rectennas designed in Complementary Metal Oxide Semiconductor Fully Depleted Silicon On Insulator (CMOS FD-SOI) 28 nm technology, to 14 μW at maximum power point (MPP), while the post-layout simulation of a single rectenna yields 5 μW at the same input power level. However, the rectenna association performance may be significantly degraded when dealing with different input power levels among rectennas. Therefore, a passive bypass circuit has been added at the output of the series association to short-circuit the weakest rectenna. The proposed design is cost-effective since there is a negligible silicon penalty and no additional power losses. In the designed four series-connected rectenna association, the total output power is 7 μW at MPP with the bypass circuit when the strongest and the weakest rectennas receive -20 and -35 dBm, respectively. Also, thanks to the bypass circuit, the efficiency of the rectenna association and the ratio of maximum achieved power are improved by, respectively, 10 and 20%

Energy: A continuing bibliography with indexes (Issue 29)

This bibliography lists 1360 reports, articles, and other documents introduced into the NASA scientific and technical information system from January 1, 1981 through March 31, 1981