Design of FIR digital filters for pulse shaping and channel equalization using time-domain optimization

Three algorithms are developed for designing finite impulse response digital filters to be used for pulse shaping and channel equalization. The first is the Minimax algorithm which uses linear programming to design a frequency-sampling filter with a pulse shape that approximates the specification in a minimax sense. Design examples are included which accurately approximate a specified impulse response with a maximum error of 0.03 using only six resonators. The second algorithm is an extension of the Minimax algorithm to design preset equalizers for channels with known impulse responses. Both transversal and frequency-sampling equalizer structures are designed to produce a minimax approximation of a specified channel output waveform. Examples of these designs are compared as to the accuracy of the approximation, the resultant intersymbol interference (ISI), and the required transmitted energy. While the transversal designs are slightly more accurate, the frequency-sampling designs using six resonators have smaller ISI and energy values

On the eigenfilter design method and its applications: a tutorial

The eigenfilter method for digital filter design involves the computation of filter coefficients as the eigenvector of an appropriate Hermitian matrix. Because of its low complexity as compared to other methods as well as its ability to incorporate various time and frequency-domain constraints easily, the eigenfilter method has been found to be very useful. In this paper, we present a review of the eigenfilter design method for a wide variety of filters, including linear-phase finite impulse response (FIR) filters, nonlinear-phase FIR filters, all-pass infinite impulse response (IIR) filters, arbitrary response IIR filters, and multidimensional filters. Also, we focus on applications of the eigenfilter method in multistage filter design, spectral/spacial beamforming, and in the design of channel-shortening equalizers for communications applications

Channel equalization to achieve high bit rates in discrete multitone systems

textMulticarrier modulation (MCM) techniques such as orthogonal frequency division multiplexing (OFDM) and discrete multi-tone (DMT) modulation are attractive for high-speed data communications due to the ease with which MCM can combat channel dispersion. With all the benefits MCM could give, DMT modulation has an extra ability to perform dynamic bit loading, which has the potential to exploit fully the available bandwidth in a slowly time-varying channel. In broadband wireline communications, DMT modulation is standardized for asymmetric digital subscribe line (ADSL) and very-high-bit-rate digital subscriber line (VDSL) modems. ADSL and VDSL standards are used by telephone companies to provide high speed data service to residences and offices. In an ADSL receiver, an equalizer is required to compensate for the channel’s dispersion in the time domain and the channel’s distortion in the frequency domain of the transmitted waveform. This dissertation proposes design methods for linear equalizers to increase the bit rate of the connection. The methods are amenable to implementation on programmable fixed-point digital signal processors, which are employed in ADSL/VDSL transceivers. A conventional ADSL equalizer consists of a time-domain equalizer, a fast Fourier transform, and a frequency domain equalizer. The time domain equalizer (TEQ) is a finite impulse response filter that when coupled with a discretized channel produces an equivalent channel whose impulse response is shorter than that of the discretized channel. This channel shortening is required by the ADSL standards. In this dissertation, I first propose a linear phase TEQ design that exploits symmetry in existing eigen-filter approaches such as minimum mean square error(MMSE), maximum shortening signal to noise ratio (MSSNR) and minimum intersymbol interference (Min-ISI) equalizers. TEQs with symmetric coefficients can reach the same performance as non-symmetric ones with much lower training complexity. Second, I improve Min-ISI design. I reformulate the cost function to make long TEQs design feasible. I remove the dependency of transmission delay in order to reduce the complexity associated with delay optimization. The quantized weighting is introduced to further lower the complexity. I also propose an iterative optimization procedure of Min-ISI that completely avoids Cholesky decomposition hence is better suited for a fixed-point implementation. Finally I propose a dual-path TEQ structure, which designs a standard singleFIR TEQ to achieve good bit rate over the entire transmission bandwidth, and designs another FIR TEQ to improve the bit rate over a subset of subcarriers. Dualpath TEQ can be viewed as a special case of a complex valued filter bank structure that delivers the best bit rate of existing DMT equalizers. However, dual-path TEQ provides a very good tradeoff between achievable bit rate vs. implementation complexity on a programmable digital signal processor.Electrical and Computer Engineerin

Initial results on an MMSE precoding and equalisation approach to MIMO PLC channels

This paper addresses some initial experiments using polynomial matrix decompositions to construct MMSE precoders and equalisers for MIMO power line communications (PLC) channels. The proposed scheme is based on a Wiener formulation based on polynomial matrices, and recent results to design and implement such systems with polynomial matrix tools. Applied to the MIMO PLC channel, the strong spectral dynamics of the PLC system together with the long impulse responses contained in the MIMO system result in problems, such that diagonlisation and spectral majorisation is mostly achieved in bands of high energy, while low-energy bands can resist any diagonalisation efforts. We introduce the subband approach in order to deal with this problem. A representative example using a simulated MIMO PLC channel is presented

Transmitter precoding and code-sharing techniques using block transmission system [TK1-9971].

Dewasa ini, perkhidmatan komunikasi bergerak telah meledak dengan begitu pantas sekali dalam masyarakat kita. Kesemua sistem komunikasi selular yang ada kini menggunakan teknologi digital. Recently, mobile communications services are penetrating into our society at an explosive growth rate. All of the current cellular communication systems have adopted digital technology

FPGA-based DOCSIS upstream demodulation

In recent years, the state-of-the-art in field programmable gate array (FPGA) technology has been advancing rapidly. Consequently, the use of FPGAs is being considered in many applications which have traditionally relied upon application-specific integrated circuits (ASICs). FPGA-based designs have a number of advantages over ASIC-based designs, including lower up-front engineering design costs, shorter time-to-market, and the ability to reconfigure devices in the field. However, ASICs have a major advantage in terms of computational resources. As a result, expensive high performance ASIC algorithms must be redesigned to fit the limited resources available in an FPGA. Concurrently, coaxial cable television and internet networks have been undergoing significant upgrades that have largely been driven by a sharp increase in the use of interactive applications. This has intensified demand for the so-called upstream channels, which allow customers to transmit data into the network. The format and protocol of the upstream channels are defined by a set of standards, known as DOCSIS 3.0, which govern the flow of data through the network. Critical to DOCSIS 3.0 compliance is the upstream demodulator, which is responsible for the physical layer reception from all customers. Although upstream demodulators have typically been implemented as ASICs, the design of an FPGA-based upstream demodulator is an intriguing possibility, as FPGA-based demodulators could potentially be upgraded in the field to support future DOCSIS standards. Furthermore, the lower non-recurring engineering costs associated with FPGA-based designs could provide an opportunity for smaller companies to compete in this market. The upstream demodulator must contain complicated synchronization circuitry to detect, measure, and correct for channel distortions. Unfortunately, many of the synchronization algorithms described in the open literature are not suitable for either upstream cable channels or FPGA implementation. In this thesis, computationally inexpensive and robust synchronization algorithms are explored. In particular, algorithms for frequency recovery and equalization are developed. The many data-aided feedforward frequency offset estimators analyzed in the literature have not considered intersymbol interference (ISI) caused by micro-reflections in the channel. It is shown in this thesis that many prominent frequency offset estimation algorithms become biased in the presence of ISI. A novel high-performance frequency offset estimator which is suitable for implementation in an FPGA is derived from first principles. Additionally, a rule is developed for predicting whether a frequency offset estimator will become biased in the presence of ISI. This rule is used to establish a channel excitation sequence which ensures the proposed frequency offset estimator is unbiased. Adaptive equalizers that compensate for the ISI take a relatively long time to converge, necessitating a lengthy training sequence. The convergence time is reduced using a two step technique to seed the equalizer. First, the ISI equivalent model of the channel is estimated in response to a specific short excitation sequence. Then, the estimated channel response is inverted with a novel algorithm to initialize the equalizer. It is shown that the proposed technique, while inexpensive to implement in an FPGA, can decrease the length of the required equalizer training sequence by up to 70 symbols. It is shown that a preamble segment consisting of repeated 11-symbol Barker sequences which is well-suited to timing recovery can also be used effectively for frequency recovery and channel estimation. By performing these three functions sequentially using a single set of preamble symbols, the overall length of the preamble may be further reduced

Digital processing of signals in the presence of inter-symbol interference and additive noise

Imperial Users onl