227 research outputs found

    Integrated 3D glass modules with high-Q inductors and thermal dissipation for RF front-end applications

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    The objectives of this research are to model, design, fabricate and validate high quality factor (Q > 100 at 2.4 GHz for 3-10 nH/mm2) inductors and innovative thermal structures with copper through-package vias to maintain low junction temperatures of < 85 oC in power amplifiers, and demonstrate ultra-thin fully-integrated dual-band (2.4 GHz/ 5GHz) WLAN modules with passive-active integration on ultra-thin glass substrates with double-side RF circuits and copper through-package vias (TPVs). Today’s RF subsystems are 2D single or multichip packages made of either organic laminates or LTCC (low temperature co-fired ceramic) substrates. The need for form-factor reduction in RF subsystems in both z and x-y direction has led to the evolution of embedded die-package architectures in thin laminates with dies facing up or down. This also reduces insertion loss and improves signal integrity by minimizing electromagnetic interference (EMI), package parasitics and routing issues. For further improvement in performance and miniaturization, glass is proposed as an ideal substrate for RF module integration. However, major design and fabrication challenges need to be addressed to achieve ultra-thin high Q RF components and also enable IC cooling to eliminate hotspots on glass substrates, which forms the key focus of this thesis.Ph.D

    Distributed active transformer - a new power-combining andimpedance-transformation technique

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    In this paper, we compare the performance of the newly introduced distributed active transformer (DAT) structure to that of conventional on-chip impedance-transformations methods. Their fundamental power-efficiency limitations in the design of high-power fully integrated amplifiers in standard silicon process technologies are analyzed. The DAT is demonstrated to be an efficient impedance-transformation and power-combining method, which combines several low-voltage push-pull amplifiers in series by magnetic coupling. To demonstrate the validity of the new concept, a 2.4-GHz 1.9-W 2-V fully integrated power-amplifier achieving a power-added efficiency of 41% with 50-Ω input and output matching has been fabricated using 0.35-μm CMOS transistor

    Substrate transfer for RF technologies

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    The constant pressure on performance improvement in RF processes is aimed at higher frequencies, less power consumption, and a higher integration level of high quality passives with digital active devices. Although excellent for the fabrication of active devices, it is the silicon substrate as a carrier that is blocking breakthroughs. Since all devices on a silicon wafer have a capacitive coupling to the resistive substrate, this results in a dissipation of RF energy, poor quality passives, cross-talk, and injection of thermal noise. We have developed a low-cost wafer-scale post-processing technology for transferring circuits, fabricated with standard IC processing, to an alternative substrate, e.g., glass. This technique comprises the gluing of a fully processed wafer, top down, to an alternative carrier followed by either partial or complete removal of the original silicon substrate. This effectively removes the drawbacks of silicon as a circuit carrier and enables the integration of high-quality passive components and eliminates cross-talk between circuit parts. A considerable development effort has brought this technology to a production-ready level of maturity. Batch-to-batch production equipment is now available and the technology and know-how are being licensed. In this paper, we present four examples to demonstrate the versatility of substrate transfer for RF applications

    Substrate transfer for RF technologies

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    An Overview of Fully On-Chip Inductors

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    This paper focuses on full integration of passive devices, especially inductors with emphasis on multi-layer stacked (MLS) structures of fully integrated inductors using patterned ground shield (PGS) and fully integrated capacitor. Comparison of different structures is focused on the main electrical parameters of integrated inductors (e.g. inductance L, inductance density LA, quality factor Q, frequency of maximum quality factor F Qmax, self-resonant frequency FSR, and series resistance R DC ) and other non-electrical parameters (e.g. required area, manufacturing process, purpose, etc.) that are equally important during comparison of the structures. Categorization of inductor structures with most significant results that was reported in the last years is proposed according to manufacturing process. Final geometrical and electrical properties of the structure in great manner accounts to the fabrication process of integrated passive device. This work offers an overview and state-of-the-art of the integrated inductors as well as manufacturing processes used for their fabrication. Second purpose of this paper is insertion of the proposed structure from our previous work among the other results reported in the last 7 years. With the proposed solution, one can obtain the highest inductance density L A = 23.59 nH/mm 2 and second highest quality factor Q = 10.09 amongst similar solutions reported in standard technologies that is also suitable competition for integrated inductors manufactured in advanced technology nodes

    Integrated phased array systems in silicon

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    Silicon offers a new set of possibilities and challenges for RF, microwave, and millimeter-wave applications. While the high cutoff frequencies of the SiGe heterojunction bipolar transistors and the ever-shrinking feature sizes of MOSFETs hold a lot of promise, new design techniques need to be devised to deal with the realities of these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, and high-frequency coupling issues. As an example of complete system integration in silicon, this paper presents the first fully integrated 24-GHz eight-element phased array receiver in 0.18-μm silicon-germanium and the first fully integrated 24-GHz four-element phased array transmitter with integrated power amplifiers in 0.18-μm CMOS. The transmitter and receiver are capable of beam forming and can be used for communication, ranging, positioning, and sensing applications

    Fully integrated low-loss band-pass filters for wireless applications

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    Fully integrated low insertion loss micromachined band-pass filters are designed and fabricated on the silicon substrate for UHF applications. Filters are made of silver, which has the highest conductivity of all metals, to minimize the ohmic loss. A detailed analysis for realizing low insertion loss and high out-of-band rejection filters using elliptic magnitude characteristics is presented, and a comprehensive model to take into account inductive parasitics of the interconnects is developed. Temperature characteristics of the filters are measured and show stable performance. The presented filters are different from the previously reported lumped element filters in that all filters are fully integrated on silicon substrate and occupy a remarkably smaller die area. Two filters are fabricated using the silver micromachining technique with center frequencies at 1.05 and 1.35 GHz. The filters have a constant 3 dB bandwidth of 300 MHz (28.6% and 22.2%) and an insertion loss of 1.4 1.7 dB. The low insertion loss and CMOS compatibility make the presented filters suitable candidates for radio frequency integrated circuits.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/65077/2/jmm9_8_085009.pd

    Above-IC RF MEMS devices for communication applications

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    Wireless communications are showing an explosive growth in emerging consumer and military applications of radiofrequency (RF), microwave, and millimeter-wave circuits and systems. Applications include wireless personal connectivity (Bluetooth), wireless local area networks (WLAN), mobile communication systems (GSM, GPRS, UMTS, CDMA), satellite communications and automotive electronics. Future cell phones and ground communication systems as well as communication satellites will require more and more sophisticated technologies. The increasing demand for size and weight reduction, cost savings, low power consumption, increased frequency and higher functionality and reconfigurability as part of multiband and multistandard operation is necessitating the use of highly integrated RF front-end circuits. Chip scaling has made a major contribution to this goal, but today a situation has been reached where the presence of numerous off-chip passive RF components imposes a critical bottleneck to further integration and miniaturization of wireless transceivers. Microelectromechanical systems (MEMS) technology is a rapidly emerging enabling technology that is intended to replace the discrete passives by their integrated counterparts. In this thesis, an original metal surface micromachining process, which is compatible with CMOS post-processing, for above-IC integration of RF MEMS tunable capacitors and suspended inductors is presented. A detailed study on SF6 inductively coupled plasma (ICP) releasing has been performed in order to ascertain the optimal process parameters. This study has emphasized the fact that temperature plays an important role in this process by limiting silicon dioxide etching. Moreover, the optimized recipe has been found to be independent of the sacrificial layer used (amorphous or polycrystalline silicon) and its thickness. Using this recipe, 15.6 µm/min Si underetch rate with high Si: SiO2 selectivity (> 20000: 1) has been obtained. Single-air-gap and double-air-gap parallel-plate MEMS tunable capacitors have been designed, fabricated and characterized in the pF range, from 1 MHz to 13.5 GHz. It has been shown that an optimized design of the suspended membrane and direct symmetrical current feed at both ports can significantly improve the quality factor and increase the self-resonant frequency, pushing it to 12 GHz and beyond. The maximum capacitance tuning range obtained for a single-air-gap capacitor is 29% for a bias voltage of 20 V. The maximum capacitance tuning range obtained for a double-air-gap capacitor is 207% for a bias voltage of 70 V. The post-processing of X-FAB BiCMOS wafers has been successfully demonstrated to fabricate monolithically integrated VCOs with above-IC MEMS LC tank. Comparing a suspended inductor and the X-FAB inductor with the same design, it has been shown that increasing the thickness of the spiral from 2.3 to 4 µm and having the spiral suspended 3 µm above the passivation layers lead to an improvement factor of 2 for the peak quality factor and a shift of the self-resonant frequency beyond 15 GHz. No significant variation on bipolar and MOS transistors characteristics due to the post-processing has been observed and we conclude that the variation due to post-processing is in the same range as the wafer-to-wafer variation. Based on our metal surface micromachining process, coplanar waveguide (CPW) MEMS shunt capacitive switches and variable true-time delay lines (V-TTDLs) have been designed, fabricated and characterized in the 1 - 20 GHz range. A novel MEMS device architecture: the SG-MOSFET, which combines a solid-state MOS transistor and a metal suspended gate has been proposed as DC current switch. The corresponding fabrication process using polysilicon as a sacrificial layer has been developed to release metal gate suspended over gate oxide by SF6 plasma. Very abrupt current switches have been demonstrated with subthreshold slope better than 10 mV/decade (better than the theoretical solid-state bulk or SOI MOSFET limit of 60 mV/decade) and ultra-low gate leakage (less than 0.001 pA/µm2) due to the air-gap
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