Design of multiplierless correlators for timing synchronization in IEEE 802.11a wireless LANs

Timing synchronization for IEEE 802.11a WLANs requires using a correlator to correlate the received signal with a known waveform. Straightforward implementation of this correlator results in the need to perform 320 million complex multiplications per second. This significant requirement can be eliminated by using multiplierless correlators. In this paper, multiplierless correlators are designed based on constraining the real and imaginary parts of correlator coefficients to be sums of powers of two. Sets of coefficients that yield good synchronization performance for simple A WGN channels are first identified; then their goodness for indoor communication environments is verified by simulation for multipath fading channels. Several multiplierless correlators are found. Comparison among these correlators identifies a good one that requires to perform only 26 addition/subtraction operations per correlator output while a similar synchronization performance can be maintained.published_or_final_versio

Efficient Correlator for OFDM Synchronization on FPGA Implementation

Orthogonal frequency division multiplexing (OFDM) is a viable technology for high-speed data transmission by virtue of its spectral efficiency and robustness to multi-path fading. These advantages can be achieved only with good synchronization both in time and frequency. The existing system consist of pipeline structure of correlator using DSP48E1 slices but it consumes a large amount of area and power and also it introduces a delay. Hence for overcoming these problems we proposed a new model. The proposed model is designed using a custom designed hardware instead of using DSP slices. It reduces area consumption, delay, power consumption and also it can be used in any FPGA architecture. DOI: 10.17762/ijritcc2321-8169.15070

Timing-Synchronization Analysis for IEEE 802.11a Wireless LANs in Frequency-Nonselective Rician Fading Environments

This paper derives and computes the probability of synchronization failure Pfail for IEEE 802.11a wireless LANs on frequency-flat Rician fading channels. For a frequency offset within ±232 kHz, it is shown that its effect on the synchronization performance is minor. The Eds/N 0 ratios required to achieve Pfail = 10-3 and 10-4 are computed, where Eds is the data-symbol energy. We find that Eds/N0 ratios over 20 dB are generally required for channels with Rician factors K ≤ 6 dB. In particular, E ds/N0 ratios that yield Pfail = 10-4 exceed 30 dB for K ≤ 4 dB.published_or_final_versio