799 research outputs found

    A novel maximal-length sequence synchronisation network

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    Spread Spectrum has become a popular digital modulation scheme in recent years. The advantages the scheme offers, at the expense of bandwidth, make it attractive in a multitude of commercial applications. The most common method, and the one of interest in this thesis, of generating Spread Spectrum is multiplying the data waveform by a wideband, digitally generated waveform. This is referred to as Direct Sequence Spread Spectrum. The characteristics of Spread Spectrum systems are determined by the spreading waveform. A common group of spreading waveforms, and the ones dealt with in this text, are the maximal-length sequences. These are a class of pseudorandom waveforms. Their properties include a two valued autocorrelation function with its maximum value at no code-phase offset. This allows for multiple access to a single resource and the suppression of multi-path interference as adjacent codes have little effect on each other. This same property requires that the receiver must accurately align its replica of the spreading waveform to the transmitted waveform in order to despread the received waveform and demodulate the data. Common methods of synchronisation use a two pronged solution. Firstly the correct code phase is determined. This is referred to as code acquisition. Secondly the clocking frequency of the received waveform must be resolved in order to precisely align the two sequences. This is referred to as code tracking. Receivers therefore tend to be complex and expensive. This thesis involved the investigation of two pseudo-noise synchronisation networks proposed by J .G. van de Groenendaal. These networks offered both code acquisition and tracking in a single robust loop. The investigation, done in co-operation with J..G. van de Groenendaal, persued two avenues. Firstly the loops were simulated. This method allows for the easy alteration of system parameters. Valuable insight into the loop dynamics can thus be gained. Secondly the loops were built on the bench. This allows for the practical confirmation of the results of the simulation. Both synchronisation loops were based on variations of the maximal likelihood phase detector. This phase detector is formed by taking the product of the first derivative with respect to time of the receiver's replica of the transmitted waveform and the received waveform. The initial investigation involved calculating the phase information generated by this phase discriminator for a variety of code-phase and frequency offsets. It was found that there were two stable points in the baseband Spread Spectrum search grid, a grid where a cell consists of a certain code-phase and frequency offset. These stable points existed at no frequency offset, which means that the loops should track the input frequency, and a one or no code-phase offset, which means that the loops should acquire either code-phase. A simple model where the novel synchronisation loop's conditions are represented by a 'ball' resting on the baseband Spread Spectrum search grid as expressed in terms of the integrated phase output of the maximal likelihood phase discriminator was developed. In this model the 'ball' will roll around the surface until one of the two stable points is entered. This describes quite accurately the paths the novel synchronisation loop does in fact take through the baseband Spread Spectrum search grid. The first loop is based directly on the maximal likelihood phase detector. The differentiator is thus in the feedback path of the loop. This results in the loop being unstable and parameter sensitive. Moving the differentiator into the input path, as in the second loop, resulted in a more stable loop. This loop therefore offered a complete, simple synchronisation solution. The novel synchronisation loop with the differentiator in the input path was found to operate at signal-to- noise ratios of -2 dB. Improvement of this signal-to-noise ratio does not offer any advantages in a Spread Spectrum environment as the loop needs to work in a coherent system where the radio frequency carrier must be resolved before the receiver's pseudo-noise sequence can be synchronised. A radio frequency carrier cannot be easily resolved at signal-to-noise ratios lower than O dB. The loop was further adapted to operate in the data environment. Under conditions of data modulation the received waveform is randomly inverted by the data. This results in the loop being driven out of lock. The phase discriminator's slope, having locked on a certain polarity, cannot track an input of the opposite polarity. The loop was adapted by including detection circuitry that would monitor the state of the receiver with respect to the incoming data waveform and alter the polarity of the of the discriminator's slope where necessary. During the prototyping of the loop on the bench certain implementations were investigated. These included the signed edge detector, a wideband low noise implementation of a square wave differentiator, and the synchronous oscillator, a form of injection locked oscillator. The loop was shown to achieve synchronisation. The novel synchronisation loop with the differentiator in the input path is thus capable of synchronising two maximal-length sequences in both code-phase and frequency

    A jittered-sampling correction technique for ADCs

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    In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough understanding of sampling in various data converters is complied

    Interactive digital signal processor

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    The Interactive Digital Signal Processor (IDSP) is examined. It consists of a set of time series analysis Operators each of which operates on an input file to produce an output file. The operators can be executed in any order that makes sense and recursively, if desired. The operators are the various algorithms used in digital time series analysis work. User written operators can be easily interfaced to the sysatem. The system can be operated both interactively and in batch mode. In IDSP a file can consist of up to n (currently n=8) simultaneous time series. IDSP currently includes over thirty standard operators that range from Fourier transform operations, design and application of digital filters, eigenvalue analysis, to operators that provide graphical output, allow batch operation, editing and display information

    On the Selection of Tuning Methodology of FOPID Controllers for the Control of Higher Order Processes

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    In this paper, a comparative study is done on the time and frequency domain tuning strategies for fractional order (FO) PID controllers to handle higher order processes. A new fractional order template for reduced parameter modeling of stable minimum/non-minimum phase higher order processes is introduced and its advantage in frequency domain tuning of FOPID controllers is also presented. The time domain optimal tuning of FOPID controllers have also been carried out to handle these higher order processes by performing optimization with various integral performance indices. The paper highlights on the practical control system implementation issues like flexibility of online autotuning, reduced control signal and actuator size, capability of measurement noise filtration, load disturbance suppression, robustness against parameter uncertainties etc. in light of the above tuning methodologies.Comment: 27 pages, 10 figure

    Output Filter Aware Optimization of the Noise Shaping Properties of {\Delta}{\Sigma} Modulators via Semi-Definite Programming

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    The Noise Transfer Function (NTF) of {\Delta}{\Sigma} modulators is typically designed after the features of the input signal. We suggest that in many applications, and notably those involving D/D and D/A conversion or actuation, the NTF should instead be shaped after the properties of the output/reconstruction filter. To this aim, we propose a framework for optimal design based on the Kalman-Yakubovich-Popov (KYP) lemma and semi-definite programming. Some examples illustrate how in practical cases the proposed strategy can outperform more standard approaches.Comment: 14 pages, 18 figures, journal. Code accompanying the paper is available at http://pydsm.googlecode.co

    Synthesis of Minimal Error Control Software

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    Software implementations of controllers for physical systems are at the core of many embedded systems. The design of controllers uses the theory of dynamical systems to construct a mathematical control law that ensures that the controlled system has certain properties, such as asymptotic convergence to an equilibrium point, while optimizing some performance criteria. However, owing to quantization errors arising from the use of fixed-point arithmetic, the implementation of this control law can only guarantee practical stability: under the actions of the implementation, the trajectories of the controlled system converge to a bounded set around the equilibrium point, and the size of the bounded set is proportional to the error in the implementation. The problem of verifying whether a controller implementation achieves practical stability for a given bounded set has been studied before. In this paper, we change the emphasis from verification to automatic synthesis. Using synthesis, the need for formal verification can be considerably reduced thereby reducing the design time as well as design cost of embedded control software. We give a methodology and a tool to synthesize embedded control software that is Pareto optimal w.r.t. both performance criteria and practical stability regions. Our technique is a combination of static analysis to estimate quantization errors for specific controller implementations and stochastic local search over the space of possible controllers using particle swarm optimization. The effectiveness of our technique is illustrated using examples of various standard control systems: in most examples, we achieve controllers with close LQR-LQG performance but with implementation errors, hence regions of practical stability, several times as small.Comment: 18 pages, 2 figure
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