Design of an adjustable bias circuit using a single-sided CMOS supply for avalanche photodiodes

A charge pump circuit operating from a single-sided CMOS supply, capable of biasing avalanche photodiodes up to 40 V with load currents in the mA range is presented. This circuit introduces new design elements that overcome previously published limitations. These elements include pass-gate voltage regulators and a mechanism for linking the negative voltage regulator to the positive voltage output. This design allows linear adjustment of the output voltage from a single control voltage. The circuit has compact dimensions of 1.55 mm × 1 mm, including bond pads, which makes it suitable for hybrid integration in a single package with an APD and two surface-mount capacitors

Control circuits for avalanche photodiodes

Avalanche Photodiodes (APDs) have been used in a wide range of low light sensing applications such as DNA sequencing, quantum key distribution, LIDAR and medical imaging. To operate the APDs, control circuits are required to achieve the desired performance characteristics. This thesis presents the work on development of three control circuits including a bias circuit, an active quench and reset circuit and a gain control circuit all of which are used for control and performance enhancement of the APDs. The bias circuit designed is used to bias planar APDs for operation in both linear and Geiger modes. The circuit is based on a dual charge pumps configuration and operates from a 5 V supply. It is capable of providing milliamp load currents for shallow-junction planar APDs that operate up to 40 V. With novel voltage regulators, the bias voltage provided by the circuit can be accurately controlled and easily adjusted by the end user. The circuit is highly integrable and provides an attractive solution for applications requiring a compact integrated APD device. The active quench and reset circuit is designed for APDs that operate in Geiger-mode and are required for photon counting. The circuit enables linear changes in the hold-off time of the Geiger-mode APD (GM-APD) from several nanoseconds to microseconds with a stable setting step of 6.5 ns. This facilitates setting the optimal `afterpulse-free' hold-off time for any GM-APD via user-controlled digital inputs. In addition this circuit doesn’t require an additional monostable or pulse generator to reset the detector, thus simplifying the circuit. Compared to existing solutions, this circuit provides more accurate and simpler control of the hold-off time while maintaining a comparable maximum count-rate of 35.2 Mcounts/s. The third circuit designed is a gain control circuit. This circuit is based on the idea of using two matched APDs to set and stabilize the gain. The circuit can provide high bias voltage for operating the planar APD, precisely set the APD’s gain (with the errors of less than 3%) and compensate for the changes in the temperature to maintain a more stable gain. The circuit operates without the need for external temperature sensing and control electronics thus lowering the system cost and complexity. It also provides a simpler and more compact solution compared to previous designs. The three circuits designed in this project were developed independently of each other and are used for improving different performance characteristics of the APD. Further research on the combination of the three circuits will produce a more compact APD-based solution for a wide range of applications

Feasibility of Geiger-mode avalanche photodiodes in CMOS standard technologies for tracker detectors

The next generation of particle colliders will be characterized by linear lepton colliders, where the collisions between electrons and positrons will allow to study in great detail the new particle discovered at CERN in 2012 (presumably the Higgs boson). At present time, there are two alternative projects underway, namely the ILC (International Linear Collider) and CLIC (Compact LInear Collider). From the detector point of view, the physics aims at these particle colliders impose such extreme requirements, that there is no sensor technology available in the market that can fulfill all of them. As a result, several new detector systems are being developed in parallel with the accelerator. This thesis presents the development of a GAPD (Geiger-mode Avalanche PhotoDiode) pixel detector aimed mostly at particle tracking at future linear colliders. GAPDs offer outstanding qualities to meet the challenging requirements of ILC and CLIC, such as an extraordinary high sensitivity, virtually infinite gain and ultra-fast response time, apart from compatibility with standard CMOS technologies. In particular, GAPD detectors enable the direct conversion of a single particle event onto a CMOS digital pulse in the sub-nanosecond time scale without the utilization of either preamplifiers or pulse shapers. As a result, GAPDs can be read out after each single bunch crossing, a unique quality that none of its competitors can offer at the moment. In spite of all these advantages, GAPD detectors suffer from two main problems. On the one side, there exist noise phenomena inherent to the sensor, which induce noise pulses that cannot be distinguished from real particle events and also worsen the detector occupancy to unacceptable levels. On the other side, the fill-factor is too low and gives rise to a reduced detection efficiency. Solutions to the two problems commented that are compliant with the severe specifications of the next generation of particle colliders have been thoroughly investigated. The design and characterization of several single pixels and small arrays that incorporate some elements to reduce the intrinsic noise generated by the sensor are presented. The sensors and the readout circuits have been monolithically integrated in a conventional HV-CMOS 0.35 μm process. Concerning the readout circuits, both voltage-mode and current-mode options have been considered. Moreover, the time-gated operation has also been explored as an alternative to reduce the detected sensor noise. The design and thorough characterization of a prototype GAPD array, also monolithically integrated in a conventional 0.35 μm HV-CMOS process, is presented in the thesis as well. The detector consists of 10 rows x 43 columns of pixels, with a total sensitive area of 1 mm x 1 mm. The array is operated in a time-gated mode and read out sequentially by rows. The efficiency of the proposed technique to reduce the detected noise is shown with a wide variety of measurements. Further improved results are obtained with the reduction of the working temperature. Finally, the suitability of the proposed detector array for particle detection is shown with the results of a beam-test campaign conducted at CERN-SPS (European Organization for Nuclear Research-Super Proton Synchrotron). Apart from that, a series of additional approaches to improve the performance of the GAPD technology are proposed. The benefits of integrating a GAPD pixel array in a 3D process in terms of overcoming the fill-factor limitation are examined first. The design of a GAPD detector in the Global Foundries 130 nm/Tezzaron 3D process is also presented. Moreover, the possibility to obtain better results in light detection applications by means of the time-gated operation or correction techniques is analyzed too.Aquesta tesi presenta el desenvolupament d’un detector de píxels de GAPDs (Geiger-mode Avalanche PhotoDiodes) dedicat principalment a rastrejar partícules en futurs col•lisionadors lineals. Els GAPDs ofereixen unes qualitats extraordinàries per satisfer els requisits extremadament exigents d’ILC (International Linear Collider) i CLIC (Compact LInear Collider), els dos projectes per la propera generació de col•lisionadors que s’han proposat fins a dia d’avui. Entre aquestes qualitats es troben una sensibilitat extremadament elevada, un guany virtualment infinit i una resposta molt ràpida, a part de ser compatibles amb les tecnologies CMOS estàndard. En concret, els detectors de GAPDs fan possible la conversió directa d’un esdeveniment generat per una sola partícula en un senyal CMOS digital amb un temps inferior al nanosegon. Com a resultat d’aquest fet, els GAPDs poden ser llegits després de cada bunch crossing (la col•lisió de les partícules), una qualitat única que cap dels seus competidors pot oferir en el moment actual. Malgrat tots aquests avantatges, els detectors de GAPDs pateixen dos grans problemes. D’una banda, existeixen fenòmens de soroll inherents al sensor, els quals indueixen polsos de soroll que no poden ser distingits dels esdeveniments reals generats per partícules i que a més empitjoren l’ocupació del detector a nivells inacceptables. D’altra banda, el fill-factor (és a dir, l’àrea sensible respecte l’àrea total) és molt baix i redueix l’eficiència detectora. En aquesta tesi s’han investigat solucions als dos problemes comentats i que a més compleixen amb les especificacions altament severes dels futurs col•lisionadors lineals. El detector de píxels de GAPDs, el qual ha estat monolíticament integrat en un procés HV-CMOS estàndard de 0.35 μm, incorpora circuits de lectura en mode voltatge que permeten operar el sensor en l’anomenat mode time-gated per tal de reduir el soroll detectat. L’eficiència de la tècnica proposada queda demostrada amb la gran varietat d’experiments que s’han dut a terme. Els resultats del beam-test dut a terme al CERN indiquen la capacitat del detector de píxels de GAPDs per detectar partícules altament energètiques. A banda d’això, també s’han estudiat els beneficis d’integrar un detector de píxels de GAPDs en un procés 3D per tal d’incrementar el fill-factor. L’anàlisi realitzat conclou que es poden assolir fill-factors superiors al 90%

A review of advances in pixel detectors for experiments with high rate and radiation

The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog. Phy

Millimeter-Precision Laser Rangefinder Using a Low-Cost Photon Counter

In this book we successfully demonstrate a millimeter-precision laser rangefinder using a low-cost photon counter. An application-specific integrated circuit (ASIC) comprises timing circuitry and single-photon avalanche diodes (SPADs) as the photodetectors. For the timing circuitry, a novel binning architecture for sampling the received signal is proposed which mitigates non-idealities that are inherent to a system with SPADs and timing circuitry in one chip

Technical Design Report for PANDA Electromagnetic Calorimeter (EMC)

This document presents the technical layout and the envisaged performance of the Electromagnetic Calorimeter (EMC) for the PANDA target spectrometer. The EMC has been designed to meet the physics goals of the PANDA experiment. The performance figures are based on extensive prototype tests and radiation hardness studies. The document shows that the EMC is ready for construction up to the front-end electronics interface

Silicon Integrated Arrays: From Microwave to IR

Integrated chips have enabled realization and mass production of complex systems in a small form factor. Through process miniaturization many novel applications in silicon photonics and electronic systems have been enabled. In this thesis I have provided several examples of innovations that are only enabled by integration. I have also demonstrated how electronics and photonics circuits can complement each other to achieve a system with superior performance.</p