Efficient, High power Precision RF and mmWave Digital Transmitter Architectures

Digital transmitters offer several advantages over conventional analog transmitters such as reconfigurability, elimination of scaling-unfriendly, power hungry and bulky analog blocks and portability across technology. The rapid advancement of technology in CMOS processes also enables integration of complex digital signal processing circuitry on the same die as the digital transmitter to compensate for their non-idealities. The use of this digital assistance can, for instance, enable the use of highly efficient but nonlinear switching-class power amplifiers by compensating for their severe nonlinearity through digital predistortion. While this shift to digitally intensive transmitter architectures is propelled by the benefits stated above, several pressing challenges arise that vary in their nature depending on the frequency of operation - from RF to mmWave. Millimeter wave CMOS power amplifiers have traditionally been limited in output power due to the low breakdown voltage of scaled CMOS technologies and poor quality of on-chip passives. Moreover, high data-rates and efficient spectrum utilization demand highly linear power amplifiers with high efficiency under back-off. However, linearity and high efficiency are traditionally at odds with each other in conventional power amplifier design. In this dissertation, digital assistance is used to relax this trade-off and enable the use of state-of-the-art switching class power amplifiers. A novel digital transmitter architecture which simultaneously employs aggressive device-stacking and large-scale power combining for watt-class output power, dynamic load modulation for linearization, and improved efficiency under back-off by supply-switching and load modulation is presented. At RF frequencies, while the problem of watt-class power amplification has been long solved, more pressing challenges arise from the crowded spectrum in this regime. A major drawback of digital transmitters is the absence of a reconstruction filter after digital-to-analog conversion which causes the baseband quantization noise to get upconverted to RF and amplified at the output of the transmitter. In high power transmitters, this upconverted noise can be so strong as to prevent their use in FDD systems due to receiver desensitization or impose stringent coexistence challenges. In this dissertation, new quantization noise suppression techniques are presented which, for the first time, contribute toward making watt-class fully-integrated digital RF transmitters a viable alternative for FDD and coexistence scenarios. Specifically, the techniques involve embedding a mixed-domain multi-tap FIR filter within highly-efficient watt-class switching power amplifiers to suppress quantization noise, enhancing the bandwidth of noise suppression, enabling tunable location of suppression and overcoming the limitations of purely digital-domain filtering techniques for quantization noise

Four-Way Microstrip-Based Power Combining for Microwave Outphasing Power Amplifiers

A lossless multi-way outphasing and power combining system for microwave power amplification is presented. The architecture addresses one of the primary drawbacks of Chireix outphasing; namely, the sub-optimal loading conditions for the branch power amplifiers. In the proposed system, four saturated power amplifiers interact through a lossless power combining network to produce nearly resistive load modulation over a 10:1 range of output powers. This work focuses on two microstrip-based power combiner implementations: a hybrid microstrip/discrete implementation using a combination of microstrip transmission line sections with discrete shunt elements, and an all-microstrip implementation incorporating open-circuited radial stubs. We demonstrate and compare these techniques in a 2.14 GHz power amplifier system. With the all-microstrip implementation, the system demonstrates a peak CW drain efficiency of 70% and drain efficiency of over 60% over a 6.5-dB outphasing output power range with a peak power of over 100 W. We demonstrate W-CDMA modulation with 55.6% average modulated efficiency at 14.1 W average output power for a 9.15-dB peak to average power ratio (PAPR) signal. The performance of this all-microstrip system is compared to that of the proposed hybrid microstrip/discrete version and a previously reported implementation in discrete lumped-element form.Massachusetts Institute of Technology. Center for Integrated Circuits and SystemsMassachusetts Institute of Technology. Microsystems Technology Laboratories. GaN Energy Initiativ

Quantifying Potential Energy Efficiency Gain in Green Cellular Wireless Networks

Conventional cellular wireless networks were designed with the purpose of providing high throughput for the user and high capacity for the service provider, without any provisions of energy efficiency. As a result, these networks have an enormous Carbon footprint. In this paper, we describe the sources of the inefficiencies in such networks. First we present results of the studies on how much Carbon footprint such networks generate. We also discuss how much more mobile traffic is expected to increase so that this Carbon footprint will even increase tremendously more. We then discuss specific sources of inefficiency and potential sources of improvement at the physical layer as well as at higher layers of the communication protocol hierarchy. In particular, considering that most of the energy inefficiency in cellular wireless networks is at the base stations, we discuss multi-tier networks and point to the potential of exploiting mobility patterns in order to use base station energy judiciously. We then investigate potential methods to reduce this inefficiency and quantify their individual contributions. By a consideration of the combination of all potential gains, we conclude that an improvement in energy consumption in cellular wireless networks by two orders of magnitude, or even more, is possible.Comment: arXiv admin note: text overlap with arXiv:1210.843

Phase manipulation for efficient radio frequency transmission

Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 109-112).Power amplifiers (PAs) for microwave communications are generally the most power-hungry element of a transmitter. High linearity is required for modern digital communications standards, and often is achieved at the expense of efficiency. Outphasing architectures, which combine multiple nonlinear but efficient switching PAs into a system with an overall linear response, represent a promising strategy for breaking the efficiency/linearity tradeoff inherent to conventional PAs. This work explores methods for efficient PA design using outphasing techniques. Two aspects of outphasing design are considered. First, a wide-band phase modulator is introduced that uses a single current-steering digital to analog converter (DAC) structure and discrete clock prerotation. This topology takes advantage of specifications particular to outphasing architectures to reduce matching requirements as compared to a two-DAC phase modulator while providing wideband capability. The phase modulator is demonstrated in 65-nm CMOS, operates over a carrier frequency range of 1.2-4.2 GHz and has a 12-bit phase resolution and sample rate of 160 MSamples/second. The second technique is a novel four-way lossless power combiner and outphasing system which provides ideally lossless power combining along with resistive loading of switching power amplifiers over a wide output range. This work presents the first-ever demonstration of this system at microwave frequencies. Particular attention is paid to the microwave-specific aspects of implementation. A 60-W GaN prototype demonstrates the outphasing and dynamic performance, which closely matches the expected performance despite the challenges of operating at microwave frequencies.by Taylor Wallis Barton.Sc.D

Advanced modulation technology development for earth station demodulator applications

The purpose of this contract was to develop a high rate (200 Mbps), bandwidth efficient, modulation format using low cost hardware, in 1990's technology. The modulation format chosen is 16-ary continuous phase frequency shift keying (CPFSK). The implementation of the modulation format uses a unique combination of a limiter/discriminator followed by an accumulator to determine transmitted phase. An important feature of the modulation scheme is the way coding is applied to efficiently gain back the performance lost by the close spacing of the phase points

RF and Millimeter-wave Techniques to Improve Scalability and Efficiency of Digital Beamforming Arrays

Spectrum overcrowding, ever increasing demand for high data rate and increased mobility requirements are three major challenges 5G-technology is trying to address. In this thesis I start with a RF front-end technique that deals with blocker interference arising from spectrum overcrowding both across frequency bands and within the same frequency bands. Chapter 3 presents a single wire IF interface design for phased array receivers which enables simple IF backhaul for high data volume MIMO systems. Finally a outphasing power amplifier(PA) design is presented in chapter 4 along with a driver amplifier with digital amplitude modulation to achieve state of the art power back off efficiency, which reduces battery usage and thus increases mobility. The first part of this thesis demonstrates the use of orthogonal sequences along to N-path filters to achieve reconfigurable select/reject filtering of signals based on their spatial, spectral and code-domain properties. A frequency/code-domain reject and select filtering is proposed and implemented using N-path switching with passive inductors as correlators. Using inductors instead of capacitors in N-path filters is challenging because of large inductance value required for our application demands use of off-chip inductors, which comes with associated parasitics and lower self-resonance frequency. In this design a cascaded inductor approach and differential N-path filtering is used to overcome inductor parasitics and enable operation at 1 GHz. A code-domain notch filter followed by a code-domain select receiver is designed and implemented in 65-nm CMOS technology. Measurements demonstrate 0.5 GHz to 1.0 GHz filter tuning range, with a maximum 26dB rejection for a blocker signal with 8dBm power, while consuming 60mW (at 1GHz operation frequency) and occupying 1.2mm2 of die area. Second part of this thesis demonstrates a single wire IF interface to simplify scaling of millimeter-wave(mm-Wave) phased array systems while preserving the data from each element, this enables spatial multiplexing, virtual arrays for radar, digital beamforming(DBF), etc. However, per-element digitization results in a formidable I/O challenge in large-scale tiled MIMO mm-Wave arrays. This dissertation demonstrates a 28 GHz 4-element MIMO RX with a single-wire interface that multiplexes the baseband signals of all elements and the LO reference through code-domain multiplexing. System considerations are presented and the approach is validated through DBF after de-multiplexing of the baseband signals from the single wire. Each element in the array achieves 16 dB conversion gain and ∼ 7 dB noise figure(NF) while consuming 60 mA from 1.2 V. The IC occupies 5.75 mm² in 65-nm CMOS. Final part of this thesis describes the design and implementation of a digital outphasing PA at 28 GHz to achieve state of the art back of efficiency. Outphasing PA require branch PA units to act as voltage sources(very low output impedance), which is challenging at mm-Wave frequencies. In this PA design an approximate class-F operation is achieved by tuning PA load network for up to 3rd harmonic. A stacked PA architecture is used for individual PA units to achieve high maximum power output. Output-power further improved by utilizing a novel diode connected stack bias circuit to improve out-put swing. PA delivers a maximum output-power of 20 dBm with a peak power added efficiency(PAE) of 27% (PA along with driver stages) and 6 dB back-off PAE of 16.5%

Energy efficiency analysis in wireless communication systems with reconfigurable RF

Orientador: Prof. Dr. André Augusto MarianoCoorientador: Prof. Dr. Glauber Gomes de Oliveira BranteTese (doutorado) - Universidade Federal do Paraná, Setor de Tecnologia, Programa de Pós-Graduação em Engenharia Elétrica. Defesa : Curitiba, 28/05/2021Inclui referências: p. 74-84Área de concentração: Sistemas EletrônicosResumo: Alta eficiˆencia energ'etica (EE) 'e crucial para aplicac¸ ˜oes da Internet das Coisas que operam remotamente, uma vez que os n'os sem fio s˜ao tipicamente alimentados por bateria. Diferentes t'ecnicas de diversidade espacial tais com o uso de m'ultiplas antenas (MIMO) nos n'os do transmissor e receptor, bem como o uso de comunicac¸ ˜ao cooperativa podem ser exploradas para melhorar a EE. Al'em disso, o uso de transceptores de r'adio frequˆencia (RF) reconfigur'aveis s˜ao considerados uma soluc¸ ˜ao interessante para sistemas com restric¸ ˜ao de energia, pois permitem alterar o seu ponto de funcionamento, bem como o seu consumo de potˆencia, adaptando-se aos diferentes requisitos de comunicac¸ ˜ao. Nessa tese, uma nova abordagem para economizar energia inclui no modelo do sistema de comunicac¸ ˜ao o uso de transceptores de RF reconfigur'aveis. Mais especificamente, os componentes envolvidos em nossa estrutura de otimizac¸ ˜ao de consumo de potˆencia s˜ao o amplificador de potˆencia (PA) no transmissor e o amplificador de baixo ru'?do (LNA) no receptor. Nosso objetivo 'e mostrar que os circuitos de RF baseados em operac¸ ˜oes mult'?modo podem melhorar significativamente a EE. Assim, realizamos uma selec¸ ˜ao conjunta dos melhores modos de operac¸ ˜ao para os circuitos do PA e do LNA para diferentes esquemas de transmiss˜ao em dois cen'arios de rede: i) comunicac¸ ˜ao n˜ao-cooperativa em que os n'os s˜ao equipados com m'ultiplas antenas, para a qual consideramos a selec¸ ˜ao de antenas (AS) e a decomposic¸ ˜ao por valores singulares (SVD); e ii) comunicac¸ ˜ao cooperativa em que os n'os s˜ao equipados com uma 'unica antena, para a qual consideramos decodificac¸ ˜ao incremental e encaminha (IDF) por rel'e. Em nosso primeiro cen'ario proposto, comparamos os circuitos reconfigur 'aveis do PA e do LNA com amplificadores de RF n˜ao-reconfigur'aveis do estado-da-arte dispon'?veis na literatura. Nesta comparac¸ ˜ao, ao explorar as caracter'?sticas dos amplificadores reconfigur'aveis de RF, mostramos uma melhora de EE de mais de 40% em distˆancias curtas para as comunicac¸ ˜oes MIMO. Ao comparar os esquemas MIMO, a t'ecnica AS apresenta melhor desempenho para distˆancias mais curtas, enquanto que o SVD permite transmiss˜oes mais longas, pois explora todas as antenas dispon'?veis. Al'em disso, a otimizac¸ ˜ao da eficiˆencia espectral contribui para aumentar ainda mais a EE. Por fim, investigamos o efeito do n'umero de antenas, em que a EE do AS sempre aumenta com o n'umero de antenas, enquanto que o SVD apresenta um n'umero 'otimo de antenas. Para o segundo cen'ario, propomos uma an'alise de EE para o esquema IDF, auxiliada por um canal de retorno para realizar a selec¸ ˜ao de rel'es. Al'em disso, comparamos o desempenho do IDF com os esquemas MIMO n˜ao-cooperativos. Os resultados mostram que uma melhor EE 'e obtida por meio de t'ecnicas de selec¸ ˜ao de antenas, principalmente quando aplicadas tanto no transmissor quanto no receptor. Tamb'em analisamos o impacto do rel'e na cooperac¸ ˜ao, uma vez que o n'o do rel'e opera apenas se necess'ario, a maior parte da carga de reconfigurabilidade 'e do rel'e, enquanto os modos de operac¸ ˜ao do PA e do LNA tendem a ser razoavelmente fixados nos n'os de origem e destino. Por fim, os resultados mostram que o n'umero de rel'es contribui para alcanc¸ar transmiss˜oes de longa distˆancia. Palavras-chave: Eficiˆencia Energ'etica, Transceptores de RF Reconfigur'aveis, Diversidade Espacial, M'ultiplas Antenas, Comunicac¸ ˜oes Cooperativas.Abstract: High energy efficiency (EE) is crucial for Internet of Things applications that operate remotely, since wireless nodes are typically battery-powered. Different spatial diversity techniques such as the use of multiple antennas (MIMO) at the transmitter and receiver nodes, as well as the use of cooperative communication can be exploited to improve the EE. In addition, the use of radio frequency (RF) transceivers are considered an interesting solution for powerrestricted systems, as they allow changing their operating point, as well as their power consumption, adapting to different communication requirements. In this thesis, a novel energy-saving approach includes in the communication system model the use of reconfigurable RF transceivers. More specifically, the components involved in our power consumption optimization framework are the power amplifier (PA) at the transmitter and the low noise amplifier (LNA) at the receiver. Our goal is to show that RF circuits based on multimode operation can significantly improve the EE. Thus, we perform a joint selection of the best operating modes for the PA and LNA circuits for different transmission schemes in two network scenarios: i) non-cooperative communication where the nodes are equipped with multiple antennas, for which we consider antenna selection (AS) and singular value decomposition (SVD) beamforming; and ii) cooperative communication where the nodes are equipped with single antenna, for which we consider incremental decode and forward (IDF) relaying. In our first proposed scenario, we compare the reconfigurable PA and LNA circuits with state-of-the-art non-reconfigurable RF amplifiers available in the literature. In this comparison, by exploiting the characteristics of reconfigurable RF amplifiers, we show an EE improvement of more than 40% at short distances for MIMO communications. When comparing MIMO schemes, the AS technique performs better for shorter distances, while the SVD allows for longer transmissions, as it exploits all available antennas. In addition, the optimization of the spectral efficiency contributes to further increase the EE. Finally, we investigate the effect of the number of antennas, in which the EE of AS always increases with the number of antennas, while SVD presents an optimal number of antennas. For the second scenario, we propose an EE analysis for the IDF scheme, aided by a feedback channel to perform relay selection. In addition, we compare the performance of the IDF with non-cooperative MIMO schemes. The results show that a better EE is obtained through antenna selection techniques, especially when applied at both transmitter and receiver. We also analyze the impact of the relay on cooperation, as the relay node operates only if necessary, most of the reconfigurability charge ends up at the relay, whereas the PA and LNA operating modes tend to be reasonably fixed at the source and destination nodes. Finally, results show that the number of relays contributes to achieving long distance transmissions. Keywords: Energy Efficiency, Reconfigurable RF Transceivers, Spatial Diversity, Multiple Antennas, Cooperative Communications

Multi look-up table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects

This paper presents a hardware implementation of a digital predistorter (DPD) for linearizing RF power amplifiers (PAs) for wideband applications. The proposed predistortion linearizer is based on a nonlinear auto-regressive moving average (NARMA) structure, which can be derived from the NARMA PA behavioral model and then mapped into a set of scalable lookup tables (LUTs). The linearizer takes advantage of its recursive nature to relax the LUT count needed to compensate memory effects in PAs. Experimental support is provided by the implementation of the proposed NARMA DPD in a field-programmable gate-array device to linearize a 170-W peak power PA, validating the recursive DPD NARMA structure for W-CDMA signals and flexible transmission bandwidth scenarios. To the best of the authors’ knowledge, it is the first time that a recursive structure is experimentally validated for DPD purposes. In addition to the results on PA efficiency and linearity, this paper addresses many practical implementation issues related to the use of FPGA in DPD applications, giving an original insight on actual prototyping scenarios. Finally, this study discusses the possibility of further enhancing the overall efficiency by degrading the PA operation mode, provided that DPD may be unavoidable due to the impact of memory effects.Peer Reviewe

Highly efficient linear CMOS power amplifiers for wireless communications

The rapidly expanding wireless market requires low cost, high integration and high performance of wireless communication systems. CMOS technology provides benefits of cost effectiveness and higher levels of integration. However, the design of highly efficient linear CMOS power amplifier that meets the requirement of advanced communication standards is a challenging task because of the inherent difficulties in CMOS technology. The objective of this research is to realize PAs for wireless communication systems that overcoming the drawbacks of CMOS process, and to develop design approaches that satisfying the demands of the industry. In this dissertation, a cascode bias technique is proposed for improving linearity and reliability of the multi-stage cascode CMOS PA. In addition, to achieve load variation immunity characteristic and to enhance matching and stability, a fully-integrated balanced PA is implemented in a 0.18-m CMOS process. A triple-mode balanced PA using switched quadrature coupler is also proposed, and this work saved a large amount of quiescent current and further improved the efficiency in the back-off power. For the low losses and a high quality factor of passive output combining, a transformer-based quadrature coupler was implemented using integrated passive device (IPD) process. Various practical approaches for linear CMOS PA are suggested with the verified results, and they demonstrate the potential PA design approach for WCDMA applications using a standard CMOS technology.PhDCommittee Chair: Kenney, J. Stevenson; Committee Member: Jongman Kim; Committee Member: Kohl, Paul A.; Committee Member: Kornegay, Kevin T.; Committee Member: Lee, Chang-H