A Modular Programmable CMOS Analog Fuzzy Controller Chip

We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital programmability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely label blocks and rule blocks. The architecture realizes a lattice partition of the universe of discourse, which at the hardware level means that the fuzzy labels associated to every input (realized by the label blocks) are shared among the rule blocks. This reduces the area and power consumption and is the key point for chip modularity. The proposed architecture is demonstrated through a 16-rule two input CMOS 1-μm prototype which features an operation speed of 2.5 Mflips (2.5×10^6 fuzzy inferences per second) with 8.6 mW power consumption. Core area occupation of this prototype is of only 1.6 mm 2 including the digital control and memory circuitry used for programmability. Because of the architecture modularity the number of inputs and rules can be increased with any hardly design effort.This work was supported in part by the Spanish C.I.C.Y.T under Contract TIC96-1392-C02- 02 (SIVA)

Regression between headmaster leadership, task load and job satisfaction of special education integration program teacher

Managing school is a daunting task for a headmaster. This responsibility is exacerbated when it involves the Special Education Integration Program (SEIP). This situation requires appropriate and effective leadership in addressing some of the issues that are currently taking place at SEIP such as task load and job satisfaction. This study aimed to identify the influence of headmaster leadership on task load and teacher job satisfaction at SEIP. This quantitative study was conducted by distributing 400 sets of randomized questionnaires to SEIP teachers across Malaysia through google form. The data obtained were then analyzed using Structural Equation Modeling (SEM) and AMOS software. The results show that there is a significant positive effect on the leadership of the headmaster and the task load of the teacher. Likewise, the construct of task load and teacher job satisfaction has a significant positive effect. However, for the construct of headmaster leadership and teacher job satisfaction, there was no significant positive relationship. This finding is very important as a reference to the school administration re-evaluating their leadership so as not to burden SEIP teachers and to give them job satisfaction. In addition, the findings of this study can also serve as a guide for SEIP teachers to increase awareness of the importance of managing their tasks. This study also focused on education leadership in general and more specifically on special education leadership

CMOS design of adaptive fuzzy ASICs using mixed-signal circuits

Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of analog CMOS chips. These chips can be made to adapt their function through electrical control. The proposed design methodology emphasizes modularity and simplicity at the circuit level - prerequisites to increasing processor complexity and operation speed. The paper include measurements from a silicon prototype of a fuzzy controller chip in CMOS 1.5 /spl mu/m single-poly technology

Neuro-fuzzy chip to handle complex tasks with analog performance

This paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of power consumption, input–output delay, and precision, performs as a fully analog implementation. However, it has much larger complexity than its purely analog counterparts. This combination of performance and complexity is achieved through the use of a mixed-signal architecture consisting of a programmable analog core of reduced complexity, and a strategy, and the associated mixed-signal circuitry, to cover the whole input space through the dynamic programming of this core. Since errors and delays are proportional to the reduced number of fuzzy rules included in the analog core, they are much smaller than in the case where the whole rule set is implemented by analog circuitry. Also, the area and the power consumption of the new architecture are smaller than those of its purely analog counterparts simply because most rules are implemented through programming. The Paper presents a set of building blocks associated to this architecture, and gives results for an exemplary prototype. This prototype, called multiplexing fuzzy controller (MFCON), has been realized in a CMOS 0.7 um standard technology. It has two inputs, implements 64 rules, and features 500 ns of input to output delay with 16-mW of power consumption. Results from the chip in a control application with a dc motor are also provided

Neuro-fuzzy chip to handle complex tasks with analog performance

This Paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of power consumption, input-output delay and precision performs as a fully analog implementation. However, it has much larger complexity than its purely analog counterparts. This combination of performance and complexity is achieved through the use of a mixed-signal architecture consisting of a programmable analog core of reduced complexity, and a strategy, and the associated mixed-signal circuitry, to cover the whole input space through the dynamic programming of this core [1]. Since errors and delays are proportional to the reduced number of fuzzy rules included in the analog core, they are much smaller than in the case where the whole rule set is implemented by analog circuitry. Also, the area and the power consumption of the new architecture are smaller than those of its purely analog counterparts simply because most rules are implemented through programming. The Paper presents a set of building blocks associated to this architecture, and gives results for an exemplary prototype. This prototype, called MFCON, has been realized in a CMOS 0.7μm standard technology. It has two inputs, implements 64 rules and features 500ns of input to output delay with 16mW of power consumption. Results from the chip in a control application with a DC motor are also provided

Modular Design of Adaptive Analog CMOS Fuzzy Controller Chips

Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of analog CMOS chips. These chips can be made to adapt their function through electrical control. The proposed design methodology emphasizes modularity and simplicity at the circuit level -- prerequisites to increasing processor complexity and operation speed. The paper include measurements from a silicon prototype of a fuzzy controller chip in CMOS 1.5μm single-poly technology

Using Building Blocks to Design Analog Neuro-Fuzzy Controllers

We present a parallel architecture for fuzzy controllers and a methodology for their realization as analog CMOS chips for low- and medium-precision applications. These chips can be made to learn through the adaptation of electrically controllable parameters guided by a dedicated hardware-compatible learning algorithm. Our designs emphasize simplicity at the circuit level—a prerequisite for increasing processor complexity and operation speed. Examples include a three-input, four-rule controller chip in 1.5-μm CMOS, single-poly, double-metal technology

A basic building block approach to CMOS design of analog neuro/fuzzy systems

Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI technologies. The proposed circuit building blocks are arranged in a layered neuro/fuzzy architecture composed of 5 layers: fuzzification, T-norm, normalization, consequent, and output. Inference is performed by using Takagi and Sugeno's (1989) IF-THEN rules, particularly where the rule's output contains only a constant term-a singleton. A simple CMOS circuit with tunable bell-like transfer characteristics is used for the fuzzification. The inputs to this circuit are voltages while the outputs are currents. Circuit blocks proposed for the remaining layers operate in the current-mode domain. Innovative circuits are proposed for the T-norm and normalization layers. The other two layers use current mirrors and KCL. All the proposed circuits emphasize simplicity at the circuit level-a prerequisite to increasing system level complexity and operation speed. A 3-input, 4-rule controller has been designed for demonstration purposes in a 1.6 /spl mu/m CMOS single-poly, double-metal technology. We include measurements from prototypes of the membership function block and detailed HSPICE simulations of the whole controller. These results operation speed in the range of 5 MFLIPS (million fuzzy logic inferences per second) with systematic errors below 1%

Analysis and Application of Advanced Control Strategies to a Heating Element Nonlinear Model

open4siSustainable control has begun to stimulate research and development in a wide range of industrial communities particularly for systems that demand a high degree of reliability and availability (sustainability) and at the same time characterised by expensive and/or safety critical maintenance work. For heating systems such as HVAC plants, clear conflict exists between ensuring a high degree of availability and reducing costly maintenance times. HVAC systems have highly non-linear dynamics and a stochastic and uncontrollable driving force as input in the form of intake air speed, presenting an interesting challenge for modern control methods. Suitable control methods can provide sustainable maximisation of energy conversion efficiency over wider than normally expected air speeds and temperatures, whilst also giving a degree of “tolerance” to certain faults, providing an important impact on maintenance scheduling, e.g. by capturing the effects of some system faults before they become serious.This paper presents the design of different control strategies applied to a heating element nonlinear model. The description of this heating element was obtained exploiting a data driven and physically meaningful nonlinear continuous time model, which represents a test bed used in passive air conditioning for sustainable housing applications. This model has low complexity while achieving high simulation performance. The physical meaningfulness of the model provides an enhanced insight into the performance and functionality of the system. In return, this information can be used during the system simulation and improved model based and data driven control designs for tight temperature regulation. The main purpose of this study is thus to give several examples of viable and practical designs of control schemes with application to this heating element model. Moreover, extensive simulations and Monte Carlo analysis are the tools for assessing experimentally the main features of the proposed control schemes, in the presence of modelling and measurement errors. These developed control methods are also compared in order to evaluate advantages and drawbacks of the considered solutions. Finally, the exploited simulation tools can serve to highlight the potential application of the proposed control strategies to real air conditioning systems.openTurhan, T.; Simani, S.; Zajic, I.; Gokcen Akkurt, G.Turhan, T.; Simani, Silvio; Zajic, I.; Gokcen Akkurt, G