Medium Access Control Layer Implementation on Field Programmable Gate Array Board for Wireless Networks

Triple play services are playing an important role in modern telecommunications systems. Nowadays, more researchers are engaged in investigating the most efficient approaches to integrate these services at a reduced level of operation costs. Field Programmable Gate Array (FPGA) boards have been found as the most suitable platform to test new protocols as they offer high levels of flexibility and customization. This thesis focuses on implementing a framework for the Triple Play Time Division Multiple Access (TP-TDMA) protocol using the Xilinx FPGA Virtex-5 board. This flexible framework design offers network systems engineers a reconfigiirable platform for triple-play systems development. In this work, MicorBlaze is used to perform memory and connectivity tests aiming to ensure the establishment of the connectivity as well as board’s processor stability. Two different approaches are followed to achieve TP-TDMA implementa­tion: systematic and conceptual. In the systematic approach, a bottom-to-top design is chosen where four subsystems are built with various components. Each component is then tested individually to investigate its response. On the other hand, the concep­tual approach is designed with only two components, in which one of them is created with the help of Xilinx Integrated Software Environment (ISE) Core Generator. The system is integrated and then tested to check its overall response. In summary, the work of this thesis is divided into three sections. The first section presents a testing method for Virtex-5 board using MicroBlaze soft processor. The following two sections concentrate on implementing the TP-TDMA protocol on the board by using two design approaches: one based on designing each component from scratch, while the other one focuses more on the system’s broader picture

A MAC protocol for quality of service provisioning in adaptive biomedical wireless sensor networks

Doctorate program on Electronics and Computer EngineeringNew healthcare solutions are being explored to improve the quality of care and the quality of life of patients, as well as the sustainability and efficiency of the healthcare services. In this context, wireless sensor networks (WSNs) constitute a key technology for closing the loop between patients and healthcare providers, as WSNs provide sensing ability, as well as mobility and portability, essential characteristics for wide acceptance of wireless healthcare technology. Despite the recent advances in the field, the wide adoption of healthcare WSNs is still conditioned by quality of service (QoS) issues, namely at the medium access control (MAC) level. MAC protocols currently available for WSNs are not able to provide the required QoS to healthcare applications in scenarios of medical emergency or intensive medical care. To cover this shortage, the present work introduces a MAC protocol with novel concepts to assure the required QoS regarding the data transmission robustness, packet delivery deadline, bandwidth efficiency, and energy preservation. The proposed MAC protocol provides a new and efficient dynamic reconfiguration mechanism, so that relevant operational parameters may be redefined dynamically in accordance with the patients’ clinical state. The protocol also provides a channel switching mechanism and the capacity of forwarding frames in two-tier network structures. To test the performance of the proposed MAC protocol and compare it with other MAC protocols, a simulation platform was implemented. In order to validate the simulation results, a physical testbed was implemented to replicate the tests and verify the results. Sensor nodes were specifically designed and assembled to implement this physical testbed. New healthcare solutions are being explored to improve the quality of care and the quality of life of patients, as well as the sustainability and efficiency of the healthcare services. In this context, wireless sensor networks (WSNs) constitute a key technology for closing the loop between patients and healthcare providers, as WSNs provide sensing ability, as well as mobility and portability, essential characteristics for wide acceptance of wireless healthcare technology. Despite the recent advances in the field, the wide adoption of healthcare WSNs is still conditioned by quality of service (QoS) issues, namely at the medium access control (MAC) level. MAC protocols currently available for WSNs are not able to provide the required QoS to healthcare applications in scenarios of medical emergency or intensive medical care. To cover this shortage, the present work introduces a MAC protocol with novel concepts to assure the required QoS regarding the data transmission robustness, packet delivery deadline, bandwidth efficiency, and energy preservation. The proposed MAC protocol provides a new and efficient dynamic reconfiguration mechanism, so that relevant operational parameters may be redefined dynamically in accordance with the patients’ clinical state. The protocol also provides a channel switching mechanism and the capacity of forwarding frames in two-tier network structures. To test the performance of the proposed MAC protocol and compare it with other MAC protocols, a simulation platform was implemented. In order to validate the simulation results, a physical testbed was implemented to replicate the tests and verify the results. Sensor nodes were specifically designed and assembled to implement this physical testbed. Preliminary tests using the simulation and physical platforms showed that simulation results diverge significantly from reality, if the performance of the WSN software components is not considered. Therefore, a parametric model was developed to reflect the impact of this aspect on a physical WSN. Simulation tests using the parametric model revealed that the results match satisfactorily those obtained in reality. After validating the simulation platform, comparative tests against IEEE 802.15.4, a prominent standard used in many wireless healthcare systems, showed that the proposed MAC protocol leads to a performance increase regarding diverse QoS metrics, such as packet loss and bandwidth efficiency, as well as scalability, adaptability, and power consumption. In this way, AR-MAC is a valuable contribution to the deployment of wireless e-health technology and related applications.Novas soluções de cuidados de saúde estão a ser exploradas para melhorar a qualidade de tratamento e a qualidade de vida dos pacientes, assim como a sustentabilidade e eficiência dos serviços de cuidado de saúde. Neste contexto, as redes de sensores sem fios (wireless sensor networks - WSN) são uma tecnologia chave para fecharem o ciclo entre os pacientes e os prestadores de cuidados de saúde, uma vez que as WSNs proporcionam não só capacidade sensorial mas também mobilidade e portabilidade, caracteristicas essenciais para a aceitação à larga escala da tecnologia dos cuidados de saúde sem fios. Apesar dos avanços recentes na área, a aceitação genérica das WSNs de cuidados de saúde ainda está condicionada por aspectos relacionados com a qualidade de serviço (quality of service - QoS), nomeadamente ao nível do controlo de acesso ao meio (medium access control - MAC). Os protocolos MAC actualmente disponíveis para WSNs são incapazes de fornecer a QoS desejada pelas aplicações médicas em cenários de emergência ou cuidados médicos intensivos. Para suprimir esta carência, o presente trabalho apresenta um protocolo MAC com novos conceitos a fim de assegurar a QoS respeitante à robustez de transmissão de dados, ao limite temporal da entrega de pacotes, à utilização da largura de banda e à preservação da energia eléctrica. O protocolo MAC proposto dispõe de um novo e eficiente mecanismo de reconfiguração para que os parâmetros operacionais relevantes possam ser redefinidos dinamicamente de acordo com o estado de saúde do paciente. O protocolo também oferece um mecanismo autónomo de comutação de canal, bem como a capacidade de encaminhar pacotes em redes de duas camadas. Para testar o desempenho do protocolo MAC proposto e compará-lo com outros protocolos MAC foi implementada uma plataforma de simulação. A fim de validar os resultados da simulação foi também implementada uma plataforma física para permitir replicar os testes e verificar os resultados. Esta plataforma física inclui nós sensoriais concebidos e construídos de raiz para o efeito. Testes preliminares usando as plataformas de simulação e física mostraram que os resultados de simulação divergem significativamente da realidade, caso o desempenho dos componentes do software presentes nos componentes da WSN não seja considerado. Por conseguinte, desenvolveu-se um modelo paramétrico para reflectir o impacto deste aspecto numa WSN real. Testes de simulação efectuados com o modelo paramétrico apresentaram resultados muito satisfatórios quando comparados com os obtidos na realidade. Uma vez validada a plataforma de simulação, efectuaram-se testes comparativos com a norma IEEE 802.15.4, proeminentemente usada em projectos académicos de cuidados de saúde sem fios. Os resultados mostraram que o protocolo MAC conduz a um desempenho superior no tocante a diversas métricas QoS, tais como perdas de pacotes e utilização de largura de banda, bem como no respeitante à escalabilidade, adaptabilidade e consumo de energia eléctrica. Assim sendo, o protocolo MAC proposto representa um valioso contributo para a concretização efectiva dos cuidados de saúde sem fios e suas aplicações

Reconfigurable Optically Interconnected Systems

With the immense growth of data consumption in today's data centers and high-performance computing systems driven by the constant influx of new applications, the network infrastructure supporting this demand is under increasing pressure to enable higher bandwidth, latency, and flexibility requirements. Optical interconnects, able to support high bandwidth wavelength division multiplexed signals with extreme energy efficiency, have become the basis for long-haul and metro-scale networks around the world, while photonic components are being rapidly integrated within rack and chip-scale systems. However, optical and photonic interconnects are not a direct replacement for electronic-based components. Rather, the integration of optical interconnects with electronic peripherals allows for unique functionalities that can improve the capacity, compute performance and flexibility of current state-of-the-art computing systems. This requires physical layer methodologies for their integration with electronic components, as well as system level control planes that incorporates the optical layer characteristics. This thesis explores various network architectures and the associated control plane, hardware infrastructure, and other supporting software modules needed to integrate silicon photonics and MEMS based optical switching into conventional datacom network systems ranging from intra-data center and high-performance computing systems to the metro-scale layer networks between data centers. In each of these systems, we demonstrate dynamic bandwidth steering and compute resource allocation capabilities to enable significant performance improvements. The key accomplishments of this thesis are as follows. In Part 1, we present high-performance computing network architectures that integrate silicon photonic switches for optical bandwidth steering, enabling multiple reconfigurable topologies that results in significant system performance improvements. As high-performance systems rely on increased parallelism by scaling up to greater numbers of processor nodes, communication between these nodes grows rapidly and the interconnection network becomes a bottleneck to the overall performance of the system. It has been observed that many scientific applications operating on high-performance computing systems cause highly skewed traffic over the network, congesting only a small percentage of the total available links while other links are underutilized. This mismatch of the traffic and the bandwidth allocation of the physical layer network presents the opportunity to optimize the bandwidth resource utilization of the system by using silicon photonic switches to perform bandwidth steering. This allows the individual processors to perform at their maximum compute potential and thereby improving the overall system performance. We show various testbeds that integrates both microring resonator and Mach-Zehnder based silicon photonic switches within Dragonfly and Fat-Tree topology networks built with conventional equipment, and demonstrate 30-60% reduction in execution time of real high-performance benchmark applications. Part 2 presents a flexible network architecture and control plane that enables autonomous bandwidth steering and IT resource provisioning capabilities between metro-scale geographically distributed data centers. It uses a software-defined control plane to autonomously provision both network and IT resources to support different quality of service requirements and optimizes resource utilization under dynamically changing load variations. By actively monitoring both the bandwidth utilization of the network and CPU or memory resources of the end hosts, the control plane autonomously provisions background or dynamic connections with different levels of quality of service using optical MEMS switching, as well as initializing live migrations of virtual machines to consolidate or distribute workload. Together these functionalities provide flexibility and maximize efficiency in processing and transferring data, and enables energy and cost savings by scaling down the system when resources are not needed. An experimental testbed of three data center nodes was built to demonstrate the feasibility of these capabilities. Part 3 presents Lightbridge, a communications platform specifically designed to provide a more seamless integration between processor nodes and an optically switched network. It addresses some of the crucial issues faced by the works presented in the previous chapters related to optical switching. When optical switches perform switching operations, they change the physical topology of the network, and they lack the capability to buffer packets, resulting in certain optical circuits being unavailable. This prompts the question of whether it is safe to transmit packets by end hosts at any given time. Lightbridge was developed to coordinate switching and routing of optical circuits across the network, by having the processors gain information about the current state of the optical network before transmitting packets, and being able to buffer packets when the optical circuit is not available. This part describes details of Lightbridge which is constituted by a loadable Linux kernel module along with other supporting modifications to the Linux kernel in order to achieve the necessary functionalities

Head-of-Line Blocking Reduction in Power-Efficient Networks-on-Chip

Tesis por compendioNowadays, thanks to the continuous improvements in the integration scale, more and more cores are added on the same chip, leading to higher system performance. In order to interconnect all nodes, a network-on-chip (NoC) is used, which is in charge of delivering data between cores. However, increasing the number of cores leads to a significant power consumption increase, leading the NoC to be one of the most expensive components in terms of power. Because of this, during the last years, several mechanisms have been proposed to address the NoC power consumption by means of DVFS (Dynamic Voltage and Frequency Scaling) and power-gating strategies. Nevertheless, improvements achieved by these mechanisms are achieved, to a greater or lesser extent, at the cost of system performance, potentially increasing the risk of saturating the network by forming congested points which, in turn, compromise the rest of the system functionality. One side effect is the creation of the "Head-of-Line blocking" effect where congested packets at the head of queues prevent other non-blocked packets from advancing. To address this issue, in this thesis, on one hand, we propose novel congestion control techniques in order to improve system performance by removing the "Head-of-Line" blocking effect. On the other hand, we propose combined solutions adapted to DVFS in order to achieve improvements in terms of performance and power. In addition to this, we propose a path-aware power-gating-based mechanism, which is capable of detecting the flows sharing buffer resources along data paths and perform to switch them off when not needed. With all these combined solutions we can significantly reduce the power consumption of the NoC when compared with state-of-the-art proposals.Hoy en día, gracias a las mejoras en la escala de integración cada vez se integran más y más núcleos en un mismo chip, mejorando así sus prestaciones. Para interconectar todos los nodos dentro del chip se emplea una red en chip (NoC, Network-on-Chip), la cual es la encargada de intercambiar información entre núcleos. No obstante, aumentar el número de núcleos en el chip también conlleva a su vez un importante incremento en el consumo de la NoC, haciendo que ésta se convierta en una de las partes más caras del chip en términos de consumo. Por ello, en los últimos años se han propuesto diversas técnicas de ahorro de energía orientadas a reducir el consumo de la NoC mediante el uso de DVFS (Dynamic Voltage and Frequency Scaling) o estrategias basadas en "power-gating". Sin embargo, éstas mejoras de consumo normalmente se obtienen a costa de sacrificar, en mayor o menor medida, las prestaciones del sistema, aumentado potencialmente así el riesgo de saturar la red, generando puntos de congestión que, a su vez, comprometen el rendimiento del resto del sistema. Un efecto colateral es el "Head-of-Line blocking", mediante el que paquetes congestionados en la cabeza de la cola impiden que otros paquetes no congestionados avancen. Con el fin de solucionar este problema, en ésta tesis, en primer lugar, proponemos técnicas novedosas de control de congestión para incrementar el rendimiento del sistema mediante la eliminación del "Head-of-Line blocking", mientras que, por otra parte, proponemos soluciones combinadas adaptadas a DVFS con el fin de conseguir mejoras en términos de rendimiento y energía. Además, proponemos una técnica de "power-gating" orientada a rutas de datos, la cual es capaz de detectar flujos de datos compartiendo recursos a lo largo de rutas y apagar dichos recursos de forma dinámica cuando no son necesarios. Con todas éstas soluciones combinadas podemos reducir el consumo de energía de la NoC en comparación con otras técnicas presentes en el estado del arte.Hui en dia, gr\`acies a les millores en l'escala d'integraci\'o, cada vegada s'integren m\'es i m\'es nuclis en un mateix xip, la qual cosa millora les seues prestacions. Per tal d'interconectar tots els nodes dins el xip es fa \'us d'una Xarxa en Xip (NoC; Network-on-Chip), la qual \'es l'encarregada d'intercanviar informaci\'o entre els nuclis. No obstant aix\`o, incrementar el nombre de nuclis en el xip tamb\'e comporta un important augment en el consum de la NoC, la qual cosa fa que aquesta es convertisca en una de les parts m\'es costoses del xip en termes de consum. Per aix\`o, en els \'ultims anys s'han proposat diverses t\`ecniques d'estalvi d'energia orientades a reduir el consum de la NoC mitjançant l'\'us de DVFS (Dynamic Voltage and Frequency Scaling) o estrat\`egies basades en ``power-gating''. Malgrat aix\`o, aquestes millores en les prestacions normalment s'obtenen a costa de sacrificar, en major o menor mesura, les prestacions del sistema i augmenta aix\'i el risc de saturar la xarxa al generar-se punts de congesti\'o, que al mateix temps, comprometen el rendiment de la resta del sistema. Un efecte col-lateral \'es el ``Head-of- Line blocking'', mitjançant el qual, els paquets congestionats al cap de la cua, impedixen que altres paquets no congestionats avancen. A fi de solucionar eixe problema, en aquesta tesi, en primer lloc, proposem noves t\`ecniques de control de congesti\'o amb l'objectiu d'incrementar el rendiment del sistema per mitj\`a de l'eliminaci\'o del ``Head-of- Line blocking'', i d'altra banda, proposem solucions combinades adaptades a DVFS amb la finalitat d'aconseguir millores en termes de rendiment i energia. A m\'es, proposem una t\`ecnica de ``power-gating'' orientada a rutes de dades, la qual \'es capa\c c de detectar fluxos de dades al compartir recursos al llarg de les rutes i apagar eixos recursos de forma din\`amica quan no s\'on necessaris. Amb totes aquestes solucions combinades podem reduir el consum d'energia de la NoC en comparaci\'o amb altres t\`ecniques presents en l'estat de l'art.Escamilla López, JV. (2017). Head-of-Line Blocking Reduction in Power-Efficient Networks-on-Chip [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/90419TESISCompendi