Design of a stereoscopic 3D video processing system based on FPGA 3D formatter in case of FPR

2013 9th International Conference on Signal-Image Technology and Internet-Based Systems, SITIS 2013 -- 2 December 2013 through 5 December 2013 -- Kyoto -- 102740In this paper, we present the details of a video processing system that combines the advantages of Film Patterned Retarder LED/LCD display technology and an FPGA based 3D formatter with enhanced, superior video processing techniques such as formatting, color correction and 3D video depth adjustment. The system includes hardware and software implementation which is designed to process stereoscopic 3D formats using a new methodology. A significant advantage of the system is the possibility to support HDMI 1.4 mandatory formats by using HDMI 1.3 capable System-on-Chip (SoC) scaler IC. The 3D function is provided by FPGA based 3D formatter. Because of the reconfigurable enhanced video blocks, the suggested FPGA based formatter can be designed as an ASIC chip to be used in TVs and set-top box (STB) applications. © 2013 IEEE