6,929 research outputs found
A micropower centroiding vision processor
Published versio
Macromodelling for analog design and robustness boosting in bio-inspired computing models
Setting specifications for the electronic implementation of biological neural-network-like vision systems on-chip is not straightforward, neither it is to simulate the resulting circuit. The structure of these systems leads to a netlist of more than 100.000 nodes for a small array of 100×150 pixels. Moreover, introducing an optical input in the low level simulation is nowadays not feasible with standard electrical simulation environments. Given that, to accomplish the task of integrating those systems in silicon to build compact, low power consuming, and reliable systems, a previous step in the standard analog electronic design flux should be introduced. Here a methodology to make the translation from the biological model to circuit-level specifications for electronic design is proposed. The purpose is to include non ideal effects as mismatching, noise, leakages, supply degradation, feedthrough, and temperature of operation in a high level description of the implementation, in order to accomplish behavioural simulations that require less computational effort and resources. A particular case study is presented, the analog electronic implementation of the locust's Lobula Giant Movement Detector (LGMD), a neural structure that fires a collision alarm based on visual information. The final goal is a collision threat detection vision system on-chip for automotive applications.European Union IST-2001-38097, TIC2003 - 09817-C02-0
Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector
The concept of capacitive coupling between sensors and readout chips is under
study for the vertex detector at the proposed high-energy CLIC electron
positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an
active High-Voltage CMOS sensor, designed to be capacitively coupled to the
CLICpix2 readout chip. The chip is implemented in a commercial nm HV-CMOS
process and contains a matrix of square pixels with m
pitch. First prototypes have been produced with a standard resistivity of
cm for the substrate and tested in standalone mode. The
results show a rise time of ns, charge gain of mV/ke and
e RMS noise for a power consumption of W/pixel. The
main design aspects, as well as standalone measurement results, are presented.Comment: 13 pages, 13 figures, 2 tables. Work carried out in the framework of
the CLICdp collaboratio
The Desktop Muon Detector: A simple, physics-motivated machine- and electronics-shop project for university students
This paper describes an undergraduate-level physics project that incorporates
various aspects of machine- and electronics-shop technical development. The
desktop muon detector is a self-contained apparatus that employs plastic
scintillator as a detection medium and a silicon photomultiplier for light
collection. These detectors can be used in conjunction with the provided
software to make interesting physics measurements. The total cost of each
counter is approximately $100.Comment: 29 pages, 14 figure
Recent X-ray hybrid CMOS detector developments and measurements
The Penn State X-ray detector lab, in collaboration with Teledyne Imaging
Sensors (TIS), have progressed their efforts to improve soft X-ray Hybrid CMOS
detector (HCD) technology on multiple fronts. Having newly acquired a Teledyne
cryogenic SIDECAR ASIC for use with HxRG devices, measurements were performed
with an H2RG HCD and the cooled SIDECAR. We report new energy resolution and
read noise measurements, which show a significant improvement over room
temperature SIDECAR operation. Further, in order to meet the demands of future
high-throughput and high spatial resolution X-ray observatories, detectors with
fast readout and small pixel sizes are being developed. We report on
characteristics of new X-ray HCDs with 12.5 micron pitch that include in-pixel
CDS circuitry and crosstalk-eliminating CTIA amplifiers. In addition, PSU and
TIS are developing a new large-scale array Speedster-EXD device. The original
64 x 64 pixel Speedster-EXD prototype used comparators in each pixel to enable
event driven readout with order of magnitude higher effective readout rates,
which will now be implemented in a 550 x 550 pixel device. Finally, the
detector lab is involved in a sounding rocket mission that is slated to fly in
2018 with an off-plane reflection grating array and an H2RG X-ray HCD. We
report on the planned detector configuration for this mission, which will
increase the NASA technology readiness level of X-ray HCDs to TRL 9.Comment: 12 pages, 11 figures, appears in Proc. SPIE 2017. error in reported
detector thickness, changed from 200 microns to 100 micron
Electronic circuits and systems: A compilation
Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays
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