1,379 research outputs found
Design and Implementation of an RF Front-End for Software Defined Radios
Software Defined Radios have brought a major reformation in the design standards for radios, in which a large portion of the functionality is implemented through pro grammable signal processing devices, giving the radio the ability to change its op erating parameters to accommodate new features and capabilities. A software radio approach reduces the content of radio frequency and other analog components of the traditional radios and emphasizes digital signal processing to enhance overall receiver flexibility. Field Programmable Gate Arrays (FPGA) are a suitable technology for the hardware platform as they offer the potential of hardware-like performance coupled with software-like programmability.
Software defined radio is a very broad field, encompassing the design of various technologies all the way from the antenna to RF, IF, and baseband digital design. The RF section primarily consists of analog hardware modules. The IF and baseband sections are primarily digital. It is the general process of the radio to convert the incoming signal from RF to IF and then IF to baseband for better signal processing system.
In this thesis, some of major building blocks of a Software defined radio are de signed and implemented using FPGAs. The design of a Digital front end, which provides the bridge between the baseband and analog RF portions of a wireless receiver, is synthesized. The Digital front end receiver consists of a digital down converter(DDC) which in turn comprises of a direct digital frequency synthesizer (DDFS), a phase accumulator and a low pass filter. The signal processing block
of the DDFS is executed using Co-ordinate Rotation Digital Computer (CORDIC) iii
Abstract
algorithm. Cascaded-Integrator-Comb filters (CIC) are implemented for changing the sample rate of the incoming data. Application of a DDC includes software ra dios, multicarrier, multimode digital receivers, micro and pico cell systems,broadband data applications, instrumentation and test equipment and in-building wireless tele phony. Also, in this thesis, interfaces for connecting Texas Instruments high speed and high resolution Analog-to-Digital converters (ADC) and Digital-to-Analog converters (DAC) with Xilinx Virtex-5 FPGAs are also implemented and demonstrated
The GEOSAT Follow-on (GFO) Altimeter
The NAVY GEOSAT Mission (1985-1990) demonstrated the ability of an altimeter equipped satellite to provide global measurements of mesoscale ocean features with 3 centimeter precision. The GEOSAT radar altimeter, developed by JHU/APL, was an enormous success. Built with early 1980\u27s technology, the GEOSAT altimeter weighed 191 pounds and consumed 146 watts. The GFO radar altimeter, under development by E-Systems Inc., will achieve the GEOSAT measurement capability, but at one-third the weight and one-half the power (48 pounds, excluding antenna, and 76 watts). The GFO altimeter uses the same proven linear FM waveform, pulse repetition frequency (PRF), pulse compression technique, and alpha-beta tracker design as the GEOSAT radar altimeter, but takes advantage of current RF and digital signal processing technologies to produce an instrument that is both light-weight and reliable. Also, thanks to a cooperative working relationship with JHU/APL, the GFO radar altimeter design encompasses lessons learned from both the GEOSAT and TOPEX programs. Analysis of the range, waveheight, and back-scattering cross section performance indicates that the GFO altimeter will achieve the GEOSAT performance in all areas. Finally, the GFO altimeter design encompasses features allowing economical expansion; including a C-band channel for improved range accuracy, and a 33% higher PRF for improved instrument noise performance. The GFO dual-channel altimeter would weigh 107 pounds and consume 156 watts
Основи схемотехніки електронних систем
Basics of circuitry are stated, principles of operation are considered, it is given calculations of analog, digital and pulse devices of electronic systems, based on semiconductor devices, integrated operational amplifiers and integrated logic circuits of TTL, MOS, CMOS types, construction principles of systems of control by electronics devices based on microprocessors and microcontrollers. For students of institutions of higher education. It can be useful for specialists on electronic engineering, specializing in the area of development, fabrication and maintenance of electronic systems and devices
Development and testing of laser Doppler system components for wake vortex monitoring. Volume 2: Scanner operations manual
The theory and operation of the scanner portion of the laser Doppler system for detecting and monitoring aircraft trailing vortices in an airport environment are discussed. Schematics, wiring diagrams, component values, and operation and checkout procedures are included
WIRELESS ANTENNA MULTIPLEXING USING TUNABLE ANTENNA FOR SPACE APPLICATIONS
Recent development in communication technologies shifts the communication paradigm from point to point to multi-user wireless systems. These developments eased the use of mobile telephone, satellite services, 5G cellular, smart application, and the
Internet of Things. The proliferation of mobile devices has necessitated an elaborate mechanism to serve multiple users over a shared communication medium, and a multiplexing approach is introduced to serve this purpose. Multiplexing refers to a method that aims at combining multiple signals into one signal such that each user would be able to extract its desired data upon receiving the multiplexed signal. This spectrum sharing allows wireless operators to maximize the use of their spectrum to accommodate a large number of users over fewer channels. In Space applications, where sensors like temperature, attitude, IR, Magnetic, etc. send information using antennas operate at a different frequency, there is a need to collect all or some of these data using a single device. A wideband antenna requires a filtering process in order to remove unwanted signals that lead to a complex circuit design. Furthermore, the use of multiple antennas ends up with a larger size and additional complexity. Therefore, the tunable antenna is an excellent candidate which provides a perfect solution for such scenarios. A tunable antenna whose frequency characteristics shifted by applying tuning action can be used to operate as a multiplexing device that can collect signals from different surrounding antennas; each operates at a fixed frequency. A system architecture for wireless multiplexing using a tunable antenna is proposed in this project. An electronically tunable antenna using varactor diode as a tuning element is used as the multiplexing device that can collect signals from different surrounding antennas. The system consists of an RF front end and a control circuit/system for wireless multiplexing. The RF front end consists of a tunable antenna, tunable phase shifter, tunable bandpass filter, low noise amplifier, mixer, voltage-controlled oscillator, and an intermediate frequency filter. The control unit comprises a microcontroller, DAC, CMOS oscillator, power module, and a USB interface for communication with custom-built software installed on a PC. The device has functions for control, digital signal processing, and de-multiplexing. The device is fed with an input multiplexed signal, and the de-multiplexed output signals are extracted and displayed on the graphical user interface of the software. Due to the reconfigurability and programmability of the device, it presents a flexible, cost-effective solution for a variety of real-world applications
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High efficiency smart voltage regulating module for green mobile computing
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.In this thesis a design for a smart high efficiency voltage regulating module capable of supplying the core of modern microprocessors incorporating dynamic voltage and frequency scaling (DVS) capability is accomplished using a RISC based microcontroller to facilitate all the functions required to control, protect, and supply the core with the required variable operating voltage as set by the DVS management system. Normally voltage regulating modules provide maximum power efficiency at designed peak load, and the efficiency falls off as the load moves towards lesser values. A mathematical model has been derived for the main converter and small signal analysis has been performed in order to determine system operation stability and select a control scheme that would improve converter operation response to transients and not requiring intense computational power to realize. A Simulation model was built using Matlab/Simulink and after experimenting with tuned PID controller and fuzzy logic controllers, a simple fuzzy logic control scheme was selected to control the pulse width modulated converter and several methods were devised to reduce the requirements for computational power making the whole system operation realizable using a low power RISC based microcontroller. The same microcontroller provides circuit adaptations operation in addition to providing protection to load in terms of over voltage and over current protection. A novel circuit technique and operation control scheme enables the designed module to selectively change some of the circuit elements in the main pulse width modulated buck converter so as to improve efficiency over a wider range of loads. In case of very light loads as the case when the device goes into standby, sleep or hibernation mode, a secondary converter starts operating and the main converter stops. The secondary converter adapts a different operation scheme using switched capacitor technique which provides high efficiency at low load currents. A fuzzy logic control scheme was chosen for the main converter for its lighter computational power requirement promoting implementation using ultra low power embedded controllers. Passive and active components were carefully selected to augment operational efficiency. These aspects enabled the designed voltage regulating module to operate with efficiency improvement in off peak load region in the range of 3% to 5%. At low loads as the case when the computer system goes to standby or sleep mode, the efficiency improvent is better than 13% which will have noticeable contribution in extending battery run time thus contributing to lowering the carbon footprint of human consumption
Efficient, High Power Density, Modular Wide Band-gap Based Converters for Medium Voltage Application
Recent advances in semiconductor technology have accelerated developments in medium-voltage direct-current (MVDC) power system transmission and distribution. A DC-DC converter is widely considered to be the most important technology for future DC networks. Wide band-gap (WBG) power devices (i.e. Silicon Carbide (SiC) and Gallium Nitride (GaN) devices) have paved the way for improving the efficiency and power density of power converters by means of higher switching frequencies with lower conduction and switching losses compared to their Silicon (Si) counterparts. However, due to rapid variation of the voltage and current, di/dt and dv/dt, to fully utilize the advantages of the Wide-bandgap semiconductors, more focus is needed to design the printed circuit boards (PCB) in terms of minimizing the parasitic components, which impacts efficiency.
The aim of this dissertation is to study the technical challenges associated with the implementation of WBG devices and propose different power converter topologies for MVDC applications. Ship power system with MVDC distribution is attracting widespread interest due to higher reliability and reduced fuel consumption. Also, since the charging time is a barrier for adopting the electric vehicles, increasing the voltage level of the dc bus to achieve the fast charging is considered to be the most important solution to address this concern. Moreover, raising the voltage level reduces the size and cost of cables in the car. Employing MVDC system in the power grid offers secure, flexible and efficient power flow.
It is shown that to reach optimal performance in terms of low package inductance and high slew rate of switches, designing a PCB with low common source inductance, power loop inductance, and gate-driver loop are essential. Compared with traditional power converters, the proposed circuits can reduce the voltage stress on switches and diodes, as well as the input current ripple. A lower voltage stress allows the designer to employ the switches and diodes with lower on-resistance RDS(ON) and forward voltage drop, respectively. Consequently, more efficient power conversion system can be achieved. Moreover, the proposed converters offer a high voltage gain that helps the power switches with smaller duty-cycle, which leads to lower current and voltage stress across them. To verify the proposed concept and prove the correctness of the theoretical analysis, the laboratory prototype of the converters using WBG devices were implemented. The proposed converters can provide energy conversion with an efficiency of 97% feeding the nominal load, which is 2% more than the efficiency of the-state-of-the-art converters. Besides the efficiency, shrinking the current ripple leads to 50% size reduction of the input filter inductors
Development of an image converter of radical design
A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product
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