6,107 research outputs found

    Repeat-Accumulate Codes for Reconciliation in Continuous Variable Quantum Key Distribution

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    This paper investigates the design of low-complexity error correction codes for the verification step in continuous variable quantum key distribution (CVQKD) systems. We design new coding schemes based on quasi-cyclic repeat-accumulate codes which demonstrate good performances for CVQKD reconciliation

    Multiplicatively Repeated Non-Binary LDPC Codes

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    We propose non-binary LDPC codes concatenated with multiplicative repetition codes. By multiplicatively repeating the (2,3)-regular non-binary LDPC mother code of rate 1/3, we construct rate-compatible codes of lower rates 1/6, 1/9, 1/12,... Surprisingly, such simple low-rate non-binary LDPC codes outperform the best low-rate binary LDPC codes so far. Moreover, we propose the decoding algorithm for the proposed codes, which can be decoded with almost the same computational complexity as that of the mother code.Comment: To appear in IEEE Transactions on Information Theor

    Reconfigurable rateless codes

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    We propose novel reconfigurable rateless codes, that are capable of not only varying the block length but also adaptively modify their encoding strategy by incrementally adjusting their degree distribution according to the prevalent channel conditions without the availability of the channel state information at the transmitter. In particular, we characterize a reconfigurable ratelesscode designed for the transmission of 9,500 information bits that achieves a performance, which is approximately 1 dB away from the discrete-input continuous-output memoryless channel’s (DCMC) capacity over a diverse range of channel signal-to-noise (SNR) ratios
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