A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators

Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, SpainThis paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade Σ∆ modulators. The salient features of this methodology ar e: (a) flexible behavioral modeling for optimum accuracy- efficiency trade-offs at different stages of the top-down synthesis process; (b) direct synthesis in the continuous-time domain for minimum circuit complexity and sensitivity; a nd (c) mixed knowledge-based and optimization-based architec- tural exploration and specification transmission for enhanced circuit performance. The applicability of this methodology will be illustrated via the design of a 12 bit 20 MHz CT Σ∆ modulator in a 1.2V 130nm CMOS technology.Ministerio de Ciencia y Educación TEC2004-01752/MICMinisterio de Industria, Turismo y Comercio FIT-330100-2006-134 SPIRIT Projec

Contributing to Second Harmonic Manipulated Continuum Mode Power Amplifiers and On-Chip Flux Concentrators

The current cellular network consumes a staggering 100 TWh of energy every year. In the coming years, millions of devices will be added to the existing network to realize the Internet of Things (IoT), further increasing its power consumption. An RF power amplifier typically consumes a large proportion of the DC power in a wireless transceiver, improving its efficiency has the largest impact on the overall system. Additionally, amplifiers need to demonstrate high linearity and bandwidth to adhere to constraints imposed by wireless standards and to reduce the number of amplifiers required as an amplifier with a broader bandwidth can potentially replace several narrowband amplifiers. A typical approach to improve efficiency is to present an appropriate load at the harmonics generated by the transistor. Recently proposed continuous modes based on harmonic manipulation, such as class B/J continuum, continuous class F (CCF) and continuous class F-1 (CCF-1), have shown the capability of achieving counteracting requirements viz., high efficiency, high linearity, and broad bandwidth (with a fractional bandwidth greater than 30%). In these classes of amplifiers, the second harmonic is manipulated by placing a reactive second harmonic load and the reactive component of the fundamental load is adjusted while keeping a fixed resistive component of the fundamental load. The first contribution of this work is to investigate the reason for amplifiers designed in classes B/J continuum and CCF to achieve high efficiency at back-off and 1dB compression. In this thesis, we demonstrate that the variation of the phase of the current through the non-linear intrinsic capacitances due to the variation of the phase in the continuum of drain voltage waveforms in Class B/J/J* continuum leads to either a reduction or enhancement of intrinsic drain current. Consequently, a subset of voltage waveforms of the class B/J/J* continuum can be used to design amplifiers with higher P1dB, and efficiency at P1dB than in Class B. A simple choice of this subset is demonstrated with a 2.6GHz Class B/J/J* amplifier, achieving a P1dB of 38.1dBm and PAE at P1dB of 54.7%, the highest output power and efficiency at P1dB amongst narrowband linear amplifiers using the CGH40010 reported to date, at a comparable peak PAE of 72%. Secondly, we propose a new formulation for high-efficiency modes of power amplifiers in which both the in-phase and out-of-phase components of the second harmonic of the current are varied, in addition to the second harmonic component of the voltage. A reduction of the in-phase component of the second harmonic of current allows reduction of the phase difference between the voltage and current waveforms, thereby increasing the power factor and efficiency. Our proposed waveforms offer a continuous design space between class B/J continuum and continuous F-1 achieving an efficiency of up to 91% in theory, but over a wider set of load impedances than continuous class F-1. These waveforms require a short at third and higher harmonic impedances, which are easier to achieve at a higher frequency. The load impedances at the second harmonic are reactive and can be of any value between -j∞ and j∞, easing the amplifier design. A trade-off between linearity and efficiency exists in the newly proposed broadband design space, but we demonstrate inherent broadband capability. The fabricated narrowband amplifier using a GaN HEMT CGH40010F demonstrates 75.9% PAE and 42.2 dBm output power at 2.6 GHz, demonstrating a comparable frequency weighted efficiency for this device to that reported in the literature. IoT devices may be deployed in critical applications such as radar or 5G transceivers of an autonomous vehicle and hence need to operate free of failure. Monitoring the drain current of the RF GaN MMIC would allow to optimize the device performance and protect it from surges in its supply current. Galvanic current sensors rely on the magnetic field generated by the current as a non-invasive method of current sensing. In this thesis, our third major contribution is a planar on-chip magnetic flux concentrator, is enhance the magnetic field at the current sensor, thereby improving the current detection capability of a current sensor. Our layout utilizes a discontinuity in a magnetic via, resulting in penetration of the magnetic field into the substrate. The proposed concentrator has a magnetic gain x1.8 in comparison to air. The permeability of the magnetic core required is 500, much lower than that reported in off-chip concentrators, resulting in a significant easing of the specifications of the material properties of the core. Additionally, we explore a novel three-dimensional spiral-shaped magnetic flux concentrator. It is predicted via simulations that this geometry becomes a necessity to enhance the magnetic field for increased form factor as the magnetic field from a single planar concentrator deteriorates as its size increases

High-Power Microwave/ Radio-Frequency Components, Circuits, and Subsystems for Next-Generation Wireless Radio Front-Ends

As the wireless communication systems evolve toward the future generation, intelligence will be the main signature/trend, well known as the concepts of cognitive and software-defined radios which offer ultimate data transmission speed, spectrum access, and user capacity. During this evolution, the human society may experience another round of `information revolution\u27. However, one of the major bottlenecks of this promotion lies in hardware realization, since all the aforementioned intelligent systems are required to cover a broad frequency range to support multiple communication bands and dissimilar standards. As the essential part of the hardware, power amplifiers (PAs) capable of operating over a wide bandwidth have been identified as the key enabling technology. This dissertation focuses on novel methodologies for designing and realizing broadband high-power PAs, their integration with high-quality-factor (high-Q) tunable filters, and relevant investigations on the reliabilities of these tunable devices. It can be basically divided into three major parts: 1.Broadband High-Efficiency Power Amplifiers. Obtaining high PA efficiency over a wide bandwidth is very challenging, because of the difficulty of performing broadband multi-harmonic matching. However, high efficiency is the critical feature for high-performance PAs due to the ever-increasing demands for environmental friendliness, energy saving, and longer battery life. In this research, novel design methodologies of broad-band highly efficient PAs are proposed, including the first-ever mode-transferring PA theory, novel matching network topology, and wideband reconfigurable PA architecture. These techniques significantly advance the state-of-the-art in terms of bandwidth and efficiency. 2.Co-Design of PAs and High-Q Tunable Filters. When implementing the intelligent communication systems, the conventional approach based on independent RF design philosophy suffers from many inherent defects, since no global optimization is achieved leading to degraded overall performance. An attractive method to solve these difficulties is to co-design critical modules of the transceiver chain. This dissertation presents the first-ever co-design of PAs and tunable filters, in which the redundant inter-module matching is entirely eliminated, leading to minimized size & cost and maximized overall performance. The saved hardware resources can be further transferred to enhance system functionalities. Moreover, we also demonstrate that co-design of PAs and filters can lead to more functionalities/benefits for the wireless systems, e.g. efficient and linear amplification of dual-carrier (or multi-carrier) signals. 3.High-Power/Non-Linear Study on Tunable Devices. High-power limitation/power handling is an everlasting theme of tunable devices, as it determines the operational life and is the threshold for actual industrial applications. Under high-power operation, the high RF voltage can lead to failures like tuners\u27 mechanical deflections and gas discharge in the small air spacing of the cavity. These two mechanisms are studied independently with their instantaneous and long-term effects on the device performance. In addition, an anti-biased topology of electrostatic RF MEMS varactors and tunable filters is proposed and experimentally validated for reducing the non-linear effect induced by bias-noise. These investigations will enlighten the designers on how to avoid and/or minimize the non-ideal effects, eventually leading to longer life cycle and performance sustainability of the tunable devices

Advanced High Efficiency and Broadband Power Amplifiers Based on GaN HEMT for Wireless Applications

In advanced wireless communication systems, a rapid increase in the mobile data traffic and broad information bandwidth requirement can lead to the use of complex spectrally efficient modulation schemes such as orthogonal frequency-division multiplexing (OFDM). Generally, complex non-constant envelope modulated signals have very high peak-to-average ratios (PAPR). Doherty Power Amplifier (DPA) is the most commonly used power amplifier (PA) architecture for meeting high efficiency requirement in advanced communication systems, in the presence of high PAPR signals. However, limited bandwidth of the conventional DPA is often identified as a bottleneck for widespread deployment in base-station application for multi-standard communication signals. The research in this thesis focuses on the development of new designs to overcome the bandwidth limitations of a conventional PA. In particular, the bandwidth limitation factors of a conventional DPA architecture are studied. Moreover, a novel design technique is proposed for DPA’s bandwidth extension. In the first PA design, limited bandwidth and linearity problems are addressed simultaneously. For this purpose, a new Class-AB PA with extended bandwidth and improved linearity is presented for LTE 5 W pico-cell base-station over a frequency range of 1.9–2.5 GHz. A two-tone load/source-pull and bias point optimization techniques are used to extract the sweet spots for optimum efficiency and linearity from the 6 W Cree GaN HEMT device for the whole frequency band. The realized prototype presented saturated PAE higher than 60%, a power gain of 13 dB and an average output power of 36.5 dBm over the desired bandwidth. The proposed PA is also characterized by QAM-256 and LTE input communication signals for linearity characterization. Measured ACPRs are lower than -40 dBc for an input power of 17 dBm. The documented results indicate that the proposed Class-AB architecture is suitable for pico-cell base-station application. In the second PA design, an inherent bandwidth limitation of Class-F power amplifier forced by the improper load harmonics terminations at multiple harmonics is investigated and analyzed. It is demonstrated that the impedance tuning of the second and third harmonics at the drain terminal of a transistor is crucial to achieve a broadband performance. The effect of harmonics terminations on power amplifier’s bandwidth up to fourth harmonics is investigated. The implemented broadband Class-F PA achieved maximum saturated drain efficiency 60-77%, and 10 W output power throughout (1.1-2.1 GHz) band. The simulated and measured results verify that the presented Class-F PA is suitable for a high-efficiency system application in wireless communications over a wide range of frequencies. In the third PA design, a single- and dual-input DPA for LTE application in the 3.5 GHz frequency band are presented and compared. The main goal of this study is to improve the performance of gallium–nitride (GaN) Doherty transmitters over a wide bandwidth in the 3.5 GHz frequency band. For this purpose, the linearity-efficiency trade-off for the two proposed architectures is discussed in detail. Simulated results demonstrate that the single- and dual-input DPA exhibited a peak drain efficiency (DE) of 72.4% and 77%, respectively. Both the circuits showed saturated output power more than 42.9 dBm throughout the designed band. Saturated efficiency, gain and bandwidth of dual-input DPA are higher than that of the single-input DPA. On the other side, dual-input DPA linearity is worse as compared to the single-input DPA. In the last PA design, a novel design methodology for ultra-wide band DPA is presented. The bandwidth limitation factors of the conventional Doherty amplifier are discussed on the ground of broadband matching with impedance variation. To extend the DPA bandwidth, three different methods are used such as post-matching, low impedance transformation ratio and the optimization of offset line for wide bandwidth in the proposed design. The proposed Doherty power amplifier was designed and realized based on two 10 W GaN HEMT devices from Cree Inc. The measured results exhibited 42-57% of efficiency at the 6-dB back-off and saturated output power ranges from 41.5 to 43.1 dBm in the frequency range of 1.15 to 2.35 GHz (68.5% fractional bandwidth). Moreover, less than -25 dBc ACPRs are measured at 42 dBm peak output power throughout the designed band. In a nutshell, all power amplifiers presented in this thesis are suitable for wideband operation and their performances are satisfying the required operational standard. Therefore, this thesis has a significant contribution in the domain of high efficiency and broadband power amplifiers

A survey on RF and microwave doherty power amplifier for mobile handset applications

This survey addresses the cutting-edge load modulation microwave and radio frequency power amplifiers for next-generation wireless communication standards. The basic operational principle of the Doherty amplifier and its defective behavior that has been originated by transistor characteristics will be presented. Moreover, advance design architectures for enhancing the Doherty power amplifier’s performance in terms of higher efficiency and wider bandwidth characteristics, as well as the compact design techniques of Doherty amplifier that meets the requirements of legacy 5G handset applications, will be discussed.Agencia Estatal de Investigación | Ref. TEC2017-88242-C3-2-RFundação para a Ciência e a Tecnologia | Ref. UIDP/50008/201

Programmable rate modem utilizing digital signal processing techniques

The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery

A Doherty Power Amplifier with Extended Bandwidth and Reconfigurable Back-off Level

Emerging wireless standards are designed to be spectrally efficient to address the high cost of licensing wireless spectra. Unfortunately, the resulting signals have a high peak-to-average ratio that reduces the base station power amplifier efficiency at the back-off power level. The wasted energy is converted to heat that degrades the device reliability and increases the base-station’s carbon footprint and cooling requirements. In addition, these new standards place stringent re- quirements on the amplifier output power, linearity, efficiency, and bandwidth. To improve the back-off efficiency, a Doherty amplifier, which uses two device in parallel for back-off efficiency enhancement, is deployed in a typical base station. Unfortunately, the conventional Doherty amplifier is narrowband and thus cannot satisfy the bandwidth requirement of the modern base station that needs to support multiple standards and backward compatibility. In this thesis, we begin by studying the class F/F−1 high efficiency mode of operation. To this end, we designed a narrowband, harmonically-tuned 3.3 GHz, 10 W GaN high efficiency amplifier. Next, we investigate how to simultaneously achieve high efficiency and broad bandwidth by harnessing the simplified real frequency technique for the broadband matching network design. A 2 to 3 GHz, 45 W GaN amplifier and a 650 to 1050 MHz, 45 W LDMOS amplifier were designed. Finally, we analyze the conventional Doherty amplifier to determine the cause of its narrow bandwidth. We find that the narrow bandwidth can be attributed to the band-limited quarter-wave transformer as well as the widely adopted traditional design technique. As an original contribution to knowledge, we propose a novel Doherty amplifier configuration with intrinsically broadband characteristics by analyzing the load modulation concept and the conventional Doherty amplifier. The proposed amplifier uses asymmetrical drain voltage biases and symmetrical devices and it does not require a complex mixed-signal setup. To demonstrate the proposed concept in practice, we designed a 700 to 1000 MHz, 90 W GaN broadband Doherty amplifier. Moreover, to show that the proposed concept is applicable to high power designs, we designed a 200 W GaN broadband Doherty amplifier in the same band. In addition, to show that the technique is independent of the device technology, we designed a 700 to 900 MHz, 60 W LDMOS broadband Doherty amplifier. Using digital pre-distortion, the three prototypes were shown to be highly linearizable when driven with wideband 20 MHz LTE and WCDMA modulated signals and achieved excellent back-off efficiency. Lastly, using the insights from the previous analyses, we propose a novel mixed-technology Doherty amplifier with an extended and reconfigurable back-off level as well as an improved power utilization factor. The reconfigurability of the proposed amplifier makes it possible to customize the back-off level to achieve the highest average efficiency for a given modulated signal without redesigning the matching networks. A 790 to 960 MHz, 180 W LDMOS/GaN Doherty amplifier demonstrated the extended bandwidth and reconfigurability of the back-off level. The proposed amplifier addresses the shortcomings of the conventional Doherty amplifier and satisfies the many requirements of a modern base station power amplifier