2,453 research outputs found

    Design of FIR Fractional Delay Filter Based on Maximum Signal-to-Noise Ratio Criterion

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    Abstract-In this paper, a new approach to the design of digital FIR fractional delay filter with consideration of noise attenuation is presented. The design is based on the maximization of signal-to-noise ratio (SNR) at the output of the fractional delay filter under the constraint that actual frequency response and ideal response have several same derivatives at the prescribed frequency point. The optimal filter coefficients are obtained from the generalized eigenvector associate with maximum eigenvalue of a pair of matrices. Numerical examples are demonstrated to show the proposed method provides higher SNR than the conventional FIR fractional delay filter design methods without considering the noise attenuation

    Programmable rate modem utilizing digital signal processing techniques

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    The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery

    Adaptive Bayesian decision feedback equalizer for dispersive mobile radio channels

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    The paper investigates adaptive equalization of time dispersive mobile ratio fading channels and develops a robust high performance Bayesian decision feedback equalizer (DFE). The characteristics and implementation aspects of this Bayesian DFE are analyzed, and its performance is compared with those of the conventional symbol or fractional spaced DFE and the maximum likelihood sequence estimator (MLSE). In terms of computational complexity, the adaptive Bayesian DFE is slightly more complex than the conventional DFE but is much simpler than the adaptive MLSE. In terms of error rate in symbol detection, the adaptive Bayesian DFE outperforms the conventional DFE dramatically. Moreover, for severely fading multipath channels, the adaptive MLSE exhibits significant degradation from the theoretical optimal performance and becomes inferior to the adaptive Bayesian DFE

    Envelope and phase delays correction in an EER radio architecture

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    International audienceThis article deals with synchronization in the Envelope Elimination and Restoration (EER) type of transmitter architecture. To illustrate the performances of such solution, we choose to apply this architecture to a 64 carriers 16QAM modulated OFDM. We first introduce the problematic of the realisation of a highly linear transmitter.We then present the Envelope Elimination and Restoration solution and draw attention to its major weakness: a high sensitivity to desynchronization between the phase and envelope signal paths. To address this issue, we propose an adaptive synchronization algorithm relying on a feedback loop, a LeastMean Square formulation and involving an interpolation step. It enables the correction of delay mismatches and tracking of possible variations. We demonstrate that the quality of the interpolator has a direct impact on Error Vector Magnitude (EVM) value and output spectrum. Implementation details are provided along with an analysis of the behaviour and performances of the method. We present HPADS and Matlab simulation results and then focus on the enhancement of the transmitter performances using the proposed algorithm

    Digital Filters

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    The new technology advances provide that a great number of system signals can be easily measured with a low cost. The main problem is that usually only a fraction of the signal is useful for different purposes, for example maintenance, DVD-recorders, computers, electric/electronic circuits, econometric, optimization, etc. Digital filters are the most versatile, practical and effective methods for extracting the information necessary from the signal. They can be dynamic, so they can be automatically or manually adjusted to the external and internal conditions. Presented in this book are the most advanced digital filters including different case studies and the most relevant literature

    Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters

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    This paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE.published_or_final_versio

    Signal Reconstruction via H-infinity Sampled-Data Control Theory: Beyond the Shannon Paradigm

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    This paper presents a new method for signal reconstruction by leveraging sampled-data control theory. We formulate the signal reconstruction problem in terms of an analog performance optimization problem using a stable discrete-time filter. The proposed H-infinity performance criterion naturally takes intersample behavior into account, reflecting the energy distributions of the signal. We present methods for computing optimal solutions which are guaranteed to be stable and causal. Detailed comparisons to alternative methods are provided. We discuss some applications in sound and image reconstruction

    FPGA Implementation of the Front-End of a DOCSIS 3.0 Receiver

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    The introduction of cable television (CATV) in the 1940s and 1950s has significantly influenced communications technology. Originally supplying only one-way television programming, the CATV industry recognized the potential of two-way communications. Starting with the introduction of pay-per view services in the 1980s, two-way communications over CATV networks eventually expanded into supplying internet access services. The increased demand for CATV services, and thus the increased demand for CATV equipment, has led the CATV industry to develop interoperability standards. The primary standard now used by the CATV industry is the Data Over Cable Service Specification (DOCSIS). DOCSIS defines both the upstream (data towards the CATV provider) and downstream (data towards the CATV customer) transmission channels. This includes specifications for the modulators and demodulators used in these channels. The number of manufacturers of CATV modulators and demodulators has greatly increased over the last twenty years and continues to do so. As the number of competitive CATV equipment suppliers increases, these manufacturers must look to ways to remain competitive by reducing time-to-market and costs associated with equipment design, as well as allowing their designs to be flexible so that they may adapt to the improvements in DOCSIS. In the past, manufacturers have primarily used Application Specific Integrated Circuits (ASICs) to implement digital hardware designs for CATV equipment. ASICs have a very high initial setup cost and do not allow for system modifications without a complete redesign. Recently, Field Programmable Gate Array (FPGA) technology has been introduced that allows manufacturers to both modify their designed digital hardware structures without a complete physical hardware redesign, as well as providing a reduced initial setup cost. Although in the long term, ASICs provide a cheaper alternative to FPGAs when produced in quantity, FPGAs provide quicker time-to-market in new product development and allow changes to made after initial release. This ability to change designs after release and the quicker time-to-market has led manufacturers to adopt FPGAs in new products. A critical component in the upstream channel of a DOCSIS compliant system is the Quadrature Amplitude Modulated (QAM) receiver. The data received at the QAM receiver have undergone several impairments including additive noise, timing offset, and frequency and phase mismatches between the transmitted modulated signal and the signal received at the demodulator. It is the function of the front-end of the receiver to correct for these impairments. This thesis presents methods for, and an example of, the design and implementation of a DOCSIS compliant QAM receiver front-end that corrects for timing, phase and frequency impairments experienced in the upstream communication channel when additive noise is present. The circuits presented are designed and implemented to reduce hardware costs when using FPGA technology. In addition, the circuits designed do not use proprietary logic, which gives designers more flexibility when implementing their own demodulator front-end circuitry. The FPGA implementation presented in this thesis achieves an average MER of 54.3 dB in a no-noise channel and close to 31 dB MER in a 25 dBc AWGN channel. The overall design uses 65 dedicated 18-bit by 18-bit multipliers and 2,970 bytes of RAM to implement the digital front-end of the receiver

    Toward Early-Warning Detection of Gravitational Waves from Compact Binary Coalescence

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    Rapid detection of compact binary coalescence (CBC) with a network of advanced gravitational-wave detectors will offer a unique opportunity for multi-messenger astronomy. Prompt detection alerts for the astronomical community might make it possible to observe the onset of electromagnetic emission from (CBC). We demonstrate a computationally practical filtering strategy that could produce early-warning triggers before gravitational radiation from the final merger has arrived at the detectors.Comment: 16 pages, 7 figures, published in ApJ. Reformatted preprint with emulateap

    Techniques to Improve the Efficiency of Data Transmission in Cable Networks

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    The cable television (CATV) networks, since their introduction in the late 1940s, have now become a crucial part of the broadcasting industry. To keep up with growing demands from the subscribers, cable networks nowadays not only provide television programs but also deliver two-way interactive services such as telephone, high-speed Internet and social TV features. A new standard for CATV networks is released every five to six years to satisfy the growing demands from the mass market. From this perspective, this thesis is concerned with three main aspects for the continuing development of cable networks: (i) efficient implementations of backward-compatibility functions from the old standard, (ii) addressing and providing solutions for technically-challenging issues in the current standard and, (iii) looking for prospective features that can be implemented in the future standard. Since 1997, five different versions of the digital CATV standard had been released in North America. A new standard often contains major improvements over the previous one. The latest version of the standard, namely DOCSIS 3.1 (released in late 2013), is packed with state-of-the-art technologies and allows approximately ten times the amount of traffic as compared to the previous standard, DOCSIS 3.0 (released in 2008). Backward-compatibility is a must-have function for cable networks. In particular, to facilitate the system migration from older standards to a newer one, the backward compatible functions in the old standards must remain in the newer-standard products. More importantly, to keep the implementation cost low, the inherited backward compatible functions must be redesigned by taking advantage of the latest technology and algorithms. To improve the backward-compatibility functions, the first contribution of the thesis focuses on redesigning the pulse shaping filter by exploiting infinite impulse response (IIR) filter structures as an alternative to the conventional finite impulse response (FIR) structures. Comprehensive comparisons show that more economical filters with better performance can be obtained by the proposed design algorithm, which considers a hybrid parameterization of the filter's transfer function in combination with a constraint on the pole radius to be less than 1. The second contribution of the thesis is a new fractional timing estimation algorithm based on peak detection by log-domain interpolation. When compared with the commonly-used timing detection method, which is based on parabolic interpolation, the proposed algorithm yields more accurate estimation with a comparable implementation cost. The third contribution of the thesis is a technique to estimate the multipath channel for DOCSIS 3.1 cable networks. DOCSIS 3.1 is markedly different from prior generations of CATV networks in that OFDM/OFDMA is employed to create a spectrally-efficient signal. In order to effectively demodulate such a signal, it is necessary to employ a demodulation circuit which involves estimation and tracking of the multipath channel. The estimation and tracking must be highly accurate because extremely dense constellations such as 4096-QAM and possibly 16384-QAM can be used in DOCSIS 3.1. The conventional OFDM channel estimators available in the literature either do not perform satisfactorily or are not suitable for the DOCSIS 3.1 channel. The novel channel estimation technique proposed in this thesis iteratively searches for parameters of the channel paths. The proposed technique not only substantially enhances the channel estimation accuracy, but also can, at no cost, accurately identify the delay of each echo in the system. The echo delay information is valuable for proactive maintenance of the network. The fourth contribution of this thesis is a novel scheme that allows OFDM transmission without the use of a cyclic prefix (CP). The structure of OFDM in the current DOCSIS 3.1 does not achieve the maximum throughput if the channel has multipath components. The multipath channel causes inter-symbol-interference (ISI), which is commonly mitigated by employing CP. The CP acts as a guard interval that, while successfully protecting the signal from ISI, reduces the transmission throughput. The problem becomes more severe for downstream direction, where the throughput of the entire system is determined by the user with the worst channel. To solve the problem, this thesis proposes major alterations to the current DOCSIS 3.1 OFDM/OFDMA structure. The alterations involve using a pair of Nyquist filters at the transceivers and an efficient time-domain equalizer (TEQ) at the receiver to reduce ISI down to a negligible level without the need of CP. Simulation results demonstrate that, by incorporating the proposed alterations to the DOCSIS 3.1 down-link channel, the system can achieve the maximum throughput over a wide range of multipath channel conditions
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