A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization

This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive sensor interfaces. For a better fitting to the characteristics of different sensor outputs, the modulator includes a programmable set of gains (x0.5, x1, x2, and x4) and a programmable set of chopper frequencies (fs/16, fs/8, fs/4 and fs/2). It has also been designed to operate within the restrictive environmental conditions of automotive electronics (-40°C, 175°C). The modulator architecture has been selected after an exhaustive comparison among multiple ΣΔM topologies in terms of resolution, speed and power dissipation. The design of the modulator building blocks is based upon a top-down CAD methodology which combines simulation and statistical optimization at different levels of the modulator hierarchy. The circuit is clocked at 5.12MHz and consumes, all together, 14.7mW from a single 3.3-V supply. Experimental measurements result in 99.77dB of Dynamic Range (DR), which combined with the gain programmability leads to an overall DR of 112dB. This puts the presented design beyond the state-of-the-art according with the existing bibliography

Wireless sensor platform for harsh environments

Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna

Design of an electric drivetrain for the Formula Student-class vehicle

Hlavním úkolem této diplomové práce bylo navrhnout a postavit funkční prototyp frekvenčního měniče pro použití ve vozidlech týmu eForce FEE Prague Formula, soutěžícího v mezinárodní inženýrské soutěži Formula Student. Práce je členěna do několika kapitol, kdy je nejdříve prozkoumán již minule provedený vývoj v týmu. Dále je vystavěna potřebná teorie pro vývoj frekvenčního měniče. Další kapitola detailně popisuje provedený vývoj zařízení. Poslední kapitoly se věnují zhodnocení navrženého měniče. Diplomová práce také prozkoumala nové možnosti v měření fázových proudů, umožňující vysokou přesnost při zachování nízké ceny a kompaktních rozměrů. Celkovým cílem bylo navrhnout jednoduché a robustní zařízení s nízkou výrobní cenou. Ověřování návrhu bylo provedeno v laboratořích fakulty pro ujištění připravenosti navrženého měniče pro nasazení do vozidla. Práce bude pokračovat na vylepšování řídícího algoritmu a postupné integraci do týmových vozidel.This thesis' main objective was to design and develop a functional motor controller for usage in a Formula Student competition vehicle of the eForce FEE Prague Formula team. Work is split into several chapters. Exploring a drivetrain development progression in the team, presenting a needed theory for a motor controller development and giving a detailed overview of the designed device. The last chapters are dedicated to evaluation of the design. Thesis had explored a new methodology in a phase current sensing, providing a significant precision while allowing for a low cost and compact design. Overall aim was to create a simple, robust and cheap solution. Verification of the design was performed in the laboratory environment of the faculty in order to ensure preparedness for integration into the vehicle. Further work will focus on control strategy improvements and final integration into the team's vehicles

System and circuitry to provide stable transconductance for biasing

An amplifier system can include an input amplifier configured to receive an analog input signal and provide an amplified signal corresponding to the analog input signal. A tracking loop is configured to employ delta modulation for tracking the amplified signal, the tracking loop providing a corresponding output signal. A biasing circuit is configured to adjust a bias current to maintain stable transconductance over temperature variations, the biasing circuit providing at least one bias signal for biasing at least one of the input amplifier and the tracking loop, whereby the circuitry receiving the at least one bias signal exhibits stable performance over the temperature variations. In another embodiment the biasing circuit can be utilized in other applications

A Two Channel Analog Front end Design AFE Design with Continuous Time Σ-Δ Modulator for ECG Signal

In this context, the AFE with 2-channels is described, which has high impedance for low power application of bio-medical electrical activity. The challenge in obtaining accurate recordings of biomedical signals such as EEG/ECG to study the human body in research work. This paper is to propose Multi-Vt in AFE circuit design cascaded with CT modulator. The new architecture is anticipated with two dissimilar input signals filtered from 2-channel to one modulator. In this methodology, the amplifier is low powered multi-VT Analog Front-End which consumes less power by applying dual threshold voltage. Type -I category 2 channel signals of the first mode: 50 and 150 Hz amplified from AFE are given to 2nd CT sigma-delta ADC. Depict the SNR and SNDR as 63dB and 60dB respectively, consuming the power of 11mW. The design was simulated in a 0.18 um standard UMC CMOS process at 1.8V supply. The AFE measured frequency response from 50 Hz to 360 Hz, depict the SNR and SNDR as 63dB and 60dB respectively, consuming the power of 11mW. The design was simulated in 0.18 m standard UMC CMOS process at 1.8V supply. The AFE measured frequency response from 50 Hz to 360 Hz, programmable gains from 52.6 dB to 72 dB, input referred noise of 3.5 μV in the amplifier bandwidth, NEF of 3

Low power sigma delta modulator with dynamic biasing for audio applications

[[abstract]]In this paper, a low power sigma delta modulator with dynamic biasing technique is presented. According to the analysis of the operations of the switched-capacitor integrator, the folded-cascode operational amplifier can be designed with optimized biasing currents in three different phases to reduce power dissipations. The total power saving is 20% of the general one. A prototyping fourth order single-bit MASH 2-2 sigma delta modulator is designed with the technique of dynamic biasing to achieve dynamic range of 95 dB and peak signal-to-noise-and-distortion-ratio of 93 dB. The experimental circuit is designed in 0.35 mum 2P4M CMOS technology. The chip area is 3.11 mm2, and the power dissipation is only 5 mW from a supply voltage of 3 V.[[conferencetype]]國際[[conferencedate]]20070805~20070808[[iscallforpapers]]Y[[conferencelocation]]Montreal, Quebec, Canad

CMOS systems and circuits for sub-degree per hour MEMS gyroscopes

The objective of our research is to develop system architectures and CMOS circuits that interface with high-Q silicon microgyroscopes to implement navigation-grade angular rate sensors. The MEMS sensor used in this work is an in-plane bulk-micromachined mode-matched tuning fork gyroscope (M² – TFG ), fabricated on silicon-on-insulator substrate. The use of CMOS transimpedance amplifiers (TIA) as front-ends in high-Q MEMS resonant sensors is explored. A T-network TIA is proposed as the front-end for resonant capacitive detection. The T-TIA provides on-chip transimpedance gains of 25MΩ, has a measured capacitive resolution of 0.02aF /√Hz at 15kHz, a dynamic range of 104dB in a bandwidth of 10Hz and consumes 400μW of power. A second contribution is the development of an automated scheme to adaptively bias the mechanical structure, such that the sensor is operated in the mode-matched condition. Mode-matching leverages the inherently high quality factors of the microgyroscope, resulting in significant improvement in the Brownian noise floor, electronic noise, sensitivity and bias drift of the microsensor. We developed a novel architecture that utilizes the often ignored residual quadrature error in a gyroscope to achieve and maintain perfect mode-matching (i.e.0Hz split between the drive and sense mode frequencies), as well as electronically control the sensor bandwidth. A CMOS implementation is developed that allows mode-matching of the drive and sense frequencies of a gyroscope at a fraction of the time taken by current state of-the-art techniques. Further, this mode-matching technique allows for maintaining a controlled separation between the drive and sense resonant frequencies, providing a means of increasing sensor bandwidth and dynamic range. The mode-matching CMOS IC, implemented in a 0.5μm 2P3M process, and control algorithm have been interfaced with a 60μm thick M2−TFG to implement an angular rate sensor with bias drift as low as 0.1°/hr ℃ the lowest recorded to date for a silicon MEMS gyro.Ph.D.Committee Chair: Farrokh Ayazi; Committee Member: Jennifer Michaels; Committee Member: Levent Degertekin; Committee Member: Paul Hasler; Committee Member: W. Marshall Leac

On chopper effects in discrete-time ΣΔ modulators

Analog-to-digital converters based on ΣΔ modulators are used in a wide variety of applications. Due to their inherent monotonous behavior, high linearity, and large dynamic range, they are often the preferred option for sensor and instrumentation. Offset and flicker noise are usual concerns for this type of applications, and one way to minimize their effects is to use a chopper in the front-end integrator of the modulator. Due to its simple operation principle, the action of the chopper in the integrator is often overlooked. In this paper, we provide an analytical study of the static effects in ΣΔ modulators, which shows that the introduction of chopper is not transparent to the modulator operation and should thus be designed with care.This work has been partially funded by the Spanish Government project TEC-2007-68072 and the CSIC project 200850I213.Peer reviewe

On chopper effects in discrete-time ΣΔ modulators

Analog-to-digital converters based on ΣΔ modulators are used in a wide variety of applications. Due to their inherent monotonous behavior, high linearity, and large dynamic range, they are often the preferred option for sensor and instrumentation. Offset and flicker noise are usual concerns for this type of applications, and one way to minimize their effects is to use a chopper in the front-end integrator of the modulator. Due to its simple operation principle, the action of the chopper in the integrator is often overlooked. In this paper, we provide an analytical study of the static effects in ΣΔ modulators, which shows that the introduction of chopper is not transparent to the modulator operation and should thus be designed with care.Gobierno de España TEC-2007-68072Consejo Superior de Investigaciones Científicas 200850I21

Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.