2,931 research outputs found

    Technical Design Report for the PANDA Micro Vertex Detector

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    This document illustrates the technical layout and the expected performance of the Micro Vertex Detector (MVD) of the PANDA experiment. The MVD will detect charged particles as close as possible to the interaction zone. Design criteria and the optimisation process as well as the technical solutions chosen are discussed and the results of this process are subjected to extensive Monte Carlo physics studies. The route towards realisation of the detector is outlined

    The Cleo Rich Detector

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    We describe the design, construction and performance of a Ring Imaging Cherenkov Detector (RICH) constructed to identify charged particles in the CLEO experiment. Cherenkov radiation occurs in LiF crystals, both planar and ones with a novel ``sawtooth''-shaped exit surface. Photons in the wavelength interval 135--165 nm are detected using multi-wire chambers filled with a mixture of methane gas and triethylamine vapor. Excellent pion/kaon separation is demonstrated.Comment: 75 pages, 57 figures, (updated July 26, 2005 to reflect reviewers comments), to be published in NIM

    Data acquisition electronics and reconstruction software for directional detection of Dark Matter with MIMAC

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    Directional detection of galactic Dark Matter requires 3D reconstruction of low energy nuclear recoils tracks. A dedicated acquisition electronics with auto triggering feature and a real time track reconstruction software have been developed within the framework of the MIMAC project of detector. This auto-triggered acquisition electronic uses embedded processing to reduce data transfer to its useful part only, i.e. decoded coordinates of hit tracks and corresponding energy measurements. An acquisition software with on-line monitoring and 3D track reconstruction is also presented.Comment: 17 pages, 12 figure

    ASIC-in-the-loop methodology for verification of piecewise affine controllers

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    This paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable application specific integrated circuit (ASIC) that imple- ments piecewise affine (PWA) controllers. The ASIC inserted into a printed circuit board (PCB) is connected to a logic analyzer that generates the input patterns to the ASIC (in particular, the values to program the memories, configuration parameters, and values of the input signals). The output provided by the ASIC is also taken by the logic analyzer. A Matlab program controls the logic analyzer to verify the PWA controller implemented by the ASIC in open-loop as well as in closed-loop configurations.Comunidad Europea FP7-INFSO-ICT-248858Gobierno Español TEC2011-24319Junta de Andalucía P08-TIC-0367

    On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs

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    This paper presents the integration of a proprietary hierarchical and distributed test access mechanism called HD2BIST and a BIST insertion commercial tool. The paper briefly describes the architecture and the features of both the environments and it presents some experimental results obtained on an industrial So

    A Proposal for a Three Detector Short-Baseline Neutrino Oscillation Program in the Fermilab Booster Neutrino Beam

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    A Short-Baseline Neutrino (SBN) physics program of three LAr-TPC detectors located along the Booster Neutrino Beam (BNB) at Fermilab is presented. This new SBN Program will deliver a rich and compelling physics opportunity, including the ability to resolve a class of experimental anomalies in neutrino physics and to perform the most sensitive search to date for sterile neutrinos at the eV mass-scale through both appearance and disappearance oscillation channels. Using data sets of 6.6e20 protons on target (P.O.T.) in the LAr1-ND and ICARUS T600 detectors plus 13.2e20 P.O.T. in the MicroBooNE detector, we estimate that a search for muon neutrino to electron neutrino appearance can be performed with ~5 sigma sensitivity for the LSND allowed (99% C.L.) parameter region. In this proposal for the SBN Program, we describe the physics analysis, the conceptual design of the LAr1-ND detector, the design and refurbishment of the T600 detector, the necessary infrastructure required to execute the program, and a possible reconfiguration of the BNB target and horn system to improve its performance for oscillation searches.Comment: 209 pages, 129 figure

    Emergency vehicle alert system, phase 2

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    The EVAS provides warning for hearing-impaired motor vehicle drivers that an emergency vehicle is in the local vicinity. Direction and distance to the emergency vehicle are presented visually to the driver. This is accomplished by a special RF transmission/reception system. During this phase the receiver and transmitter from Phase 1 were updated and modified and a directional antenna developed. The system was then field tested with good results. Static and dynamic (moving vehicle) tests were made with the direction determined correctly 98 percent of the time

    A double-sided silicon micro-strip super-module for the ATLAS inner detector upgrade in the high-luminosity LHC

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    The ATLAS experiment is a general purpose detector aiming to fully exploit the discovery potential of the Large Hadron Collider (LHC) at CERN. It is foreseen that after several years of successful data-taking, the LHC physics programme will be extended in the so-called High-Luminosity LHC, where the instantaneous luminosity will be increased up to 5 × 1034 cm−2 s−1. For ATLAS, an upgrade scenario will imply the complete replacement of its internal tracker, as the existing detector will not provide the required performance due to the cumulated radiation damage and the increase in the detector occupancy. The current baseline layout for the new ATLAS tracker is an all-silicon-based detector, with pixel sensors in the inner layers and silicon micro-strip detectors at intermediate and outer radii. The super-module is an integration concept proposed for the strip region of the future ATLAS tracker, where double-sided stereo silicon micro-strip modules are assembled into a low-mass local support structure. An electrical super-module prototype for eight double-sided strip modules has been constructed. The aim is to exercise the multi-module readout chain and to investigate the noise performance of such a system. In this paper, the main components of the current super-module prototype are described and its electrical performance is presented in detail
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