Design and Analysis of Low-power Millimeter-Wave SiGe BiCMOS Circuits with Application to Network Measurement Systems

Interest in millimeter (mm-) wave frequencies covering the spectrum of 30-300 GHz has been steadily increasing. Advantages such as larger absolute bandwidth and smaller form-factor have made this frequency region attractive for numerous applications, including high-speed wireless communication, sensing, material science, health, automotive radar, and space exploration. Continuous development of silicon-germanium heterojunction bipolar transistor (SiGe HBT) and associated BiCMOS technology has achieved transistors with fT/fmax of 505/720 GHz and integration with 55 nm CMOS. Such accomplishment and predictions of beyond THz performance have made SiGe BiCMOS technology the most competitive candidate for addressing the aforementioned applications. Especially for mobile applications, a critical demand for future mm-wave applications will be low DC power consumption (Pdc), which requires a substantial reduction of supply voltage and current. Conventionally, reducing the supply voltage will lead to HBTs operating close to or in the saturation region, which is typically avoided in mm-wave circuits due to expectated performance degradation and often inaccurate models. However, due to only moderate speed reduction at the forward-biased base-collector voltage (VBC) up to 0.5 V and the accuracy of the compact model HICUM/L2 also in saturation, low-power mm-wave circuits with SiGe HBTs operating in saturation offer intriguing benefits, which have been explored in this thesis based on 130 nm SiGe BiCMOS technologies: • Different low-power mm-wave circuit blocks are discussed in detail, including low-noise amplifiers (LNAs), down-conversion mixers, and various frequency multipliers covering a wide frequency range from V-band (50-75 GHz) to G-band (140-220 GHz). • Aiming at realizing a better trade-off between Pdc and RF performance, a drastic decrease in supply voltage is realized with forward-biased VBC, forcing transistors of the circuits to operate in saturation. • Discussions contain the theoretical analysis of the key figure of merits (FoMs), topology and bias selection, device sizing, and performance enhancement techniques. • A 173-207 GHz low-power amplifier with 23 dB gain and 3.2 mW Pdc, and a 72-108 GHz low-power tunable amplifier with 10-23 dB gain and 4-21 mW Pdc were designed. • A 97 GHz low-power down-conversion mixer was presented with 9.6 dB conversion gain (CG) and 12 mW Pdc. • For multipliers, a 56-66 GHz low-power frequency quadrupler with -3.6 dB peak CG and 12 mW Pdc, and a 172-201 GHz low-power frequency tripler with -4 dB peak CG and 10.5 mW Pdc were realized. By cascading these two circuits, also a 176-193 GHz low-power ×12 multiplier was designed, achieving -11 dBm output power with only 26 mW Pdc. • An integrated 190 GHz low-power receiver was designed as one receiving channel of a G-band frequency extender specifically for a VNA-based measurement system. Another goal of this receiver is to explore the lowest possible Pdc while keeping its highly competitive RF performance for general applications requiring a wide LO tuning range. Apart from the low-power design method of circuit blocks, the careful analysis and distribution of the receiver FoMs are also applied for further reduction of the overall Pdc. Along this line, this receiver achieved a peak CG of 49 dB with a 14 dB tunning range, consuming only 29 mW static Pdc for the core part and 171 mW overall Pdc, including the LO chain. • All designs presented in this thesis were fabricated and characterized on-wafer. Thanks to the accurate compact model HICUM/L2, first-pass access was achieved for all circuits, and simulation results show excellent agreement with measurements. • Compared with recently published work, most of the designs in this thesis show extremely low Pdc with highly competitive key FoMs regarding gain, bandwidth, and noise figure. • The observed excellent measurement-simulation agreement enables the sensitivity analysis of each design for obtaining a deeper insight into the impact of transistor-related physical effects on critical circuit performance parameters. Such studies provide meaningful feedback for process improvement and modeling development.:Table of Contents Kurzfassung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii 1 Introduction 1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of symbols and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Technology 7 2.1 Fabrication Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 SiGe HBT performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 B11HFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1.3 SG13G2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.4 SG13D7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 Commonly Used Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.1 Grounded-sidewall-shielded microstrip line . . . . . . . . . . . . . . . . . . 12 2.2.2 Zero-impedance Transmission Line . . . . . . . . . . . . . . . . . . . . . . 15 2.2.3 Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.2.3.1 Active Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.3.2 Passive Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3 Low-power Low-noise Amplifiers 25 3.1 173-207 GHz Ultra-low-power Amplifier . . . . . . . . . . . . . . . . . . . . . . . 25 3.1.1 Topology Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.1.2 Bias Dependency of the Small-signal Performance . . . . . . . . . . . . . 27 3.1.2.1 Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.1.2.2 Bias vs Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.1.2.3 Bias vs Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.1.2.4 Bias vs Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3.1.3 Bias selection and Device sizing . . . . . . . . . . . . . . . . . . . . . . . . 36 3.1.3.1 Bias Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.1.3.2 Device Sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.1.4 Performance Enhancement Technologies . . . . . . . . . . . . . . . . . . . 41 3.1.4.1 Gm-boosting Inductors . . . . . . . . . . . . . . . . . . . . . . . 41 3.1.4.2 Stability Enhancement . . . . . . . . . . . . . . . . . . . . . . . 43 3.1.4.3 Noise Improvement . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.1.5 Circuit Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.1.5.1 Layout Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.1.5.2 Inductors Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.1.5.3 Dual-band Matching Network . . . . . . . . . . . . . . . . . . . 48 3.1.5.4 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . 50 3.1.6 Results and Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.1 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.2 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.3 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.2 72-108 GHz Low-Power Tunable Amplifier . . . . . . . . . . . . . . . . . . . . . . 55 3.2.1 Configuration, Sizing, and Bias Tuning Range . . . . . . . . . . . . . . . . 55 3.2.2 Regional Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.2.2.1 Impedance Variation . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.2.2.2 Regional Matching Network Design . . . . . . . . . . . . . . . . 60 3.2.3 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 3.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 4 Low-power Down-conversion Mixers 73 4.1 97 GHz Low-power Down-conversion Mixer . . . . . . . . . . . . . . . . . . . . . 74 4.1.1 Mixer Design and Implementation . . . . . . . . . . . . . . . . . . . . . . 74 4.1.1.1 Mixer Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 4.1.1.2 Bias Selection and Device Sizing . . . . . . . . . . . . . . . . . . 77 4.1.1.3 Mixer Implementation . . . . . . . . . . . . . . . . . . . . . . . . 79 4.1.2 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 4.1.2.1 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 80 4.1.2.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 4.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 5 Low-power Multipliers 87 5.1 General Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 5.2 56-66 GHz Low-power Frequency Quadrupler . . . . . . . . . . . . . . . . . . . . 89 5.3 172-201 GHz Low-power Frequency Tripler . . . . . . . . . . . . . . . . . . . . . 93 5.4 176-193 GHz Low-power ×12 Frequency Multiplier . . . . . . . . . . . . . . . . . 96 5.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 6 Low-power Receivers 101 6.1 Receiver Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6.2 LO Chain (×12) Integrated 190 GHz Low-Power Receiver . . . . . . . . . . . . . 104 6.2.1 Receiver Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 6.2.2 Low-power Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 6.2.3 Building Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 6.2.3.1 LNA and LO DA . . . . . . . . . . . . . . . . . . . . . . . . . . 108 6.2.3.2 Tunable Mixer and IF BA . . . . . . . . . . . . . . . . . . . . . 111 6.2.3.3 65 GHz (V-band) Quadrupler . . . . . . . . . . . . . . . . . . . 116 6.2.3.4 G-band Tripler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 6.2.4 Receiver Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . 123 6.2.5 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 6.2.6 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 6.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 7 Conclusions 133 7.1 Summaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 7.2 Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Bibliography 135 List of Figures 149 List of Tables 157 A Derivation of the Gm 159 A.1 Gm of standard cascode stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 A.2 Gm of cascode stage with Lcas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 A.3 Gm of cascode stage with Lb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 B Derivation of Yin in the stability analysis 163 C Derivation of Zin and Zout 165 C.1 Zin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 C.2 Zout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 D Derivation of the cascaded oP1dB 169 E Table of element values for the designed circuits 17

Passive and active circuits in cmos technology for rf, microwave and millimeter wave applications

The permeation of CMOS technology to radio frequencies and beyond has fuelled an urgent need for a diverse array of passive and active circuits that address the challenges of rapidly emerging wireless applications. While traditional analog based design approaches satisfy some applications, the stringent requirements of newly emerging applications cannot necessarily be addressed by existing design ideas and compel designers to pursue alternatives. One such alternative, an amalgamation of microwave and analog design techniques, is pursued in this work. A number of passive and active circuits have been designed using a combination of microwave and analog design techniques. For passives, the most crucial challenge to their CMOS implementation is identified as their large dimensions that are not compatible with CMOS technology. To address this issue, several design techniques – including multi-layered design and slow wave structures – are proposed and demonstrated through experimental results after being suitably tailored for CMOS technology. A number of novel passive structures - including a compact 10 GHz hairpin resonator, a broadband, low loss 25-35 GHz Lange coupler, a 25-35 GHz thin film microstrip (TFMS) ring hybrid, an array of 0.8 nH and 0.4 nH multi-layered high self resonant frequency (SRF) inductors are proposed, designed and experimentally verified. A number of active circuits are also designed and notable experimental results are presented. These include 3-10 GHz and DC-20 GHz distributed low noise amplifiers (LNA), a dual wideband Low noise amplifier and 15 GHz distributed voltage controlled oscillators (DVCO). Distributed amplifiers are identified as particularly effective in the development of wideband receiver front end sub-systems due to their gain flatness, excellent matching and high linearity. The most important challenge to the implementation of distributed amplifiers in CMOS RFICs is identified as the issue of their miniaturization. This problem is solved by using integrated multi-layered inductors instead of transmission lines to achieve over 90% size compression compared to earlier CMOS implementations. Finally, a dual wideband receiver front end sub-system is designed employing the miniaturized distributed amplifier with resonant loads and integrated with a double balanced Gilbert cell mixer to perform dual band operation. The receiver front end measured results show 15 dB conversion gain, and a 1-dB compression point of -4.1 dBm in the centre of band 1 (from 3.1 to 5.0 GHz) and -5.2 dBm in the centre of band 2 (from 5.8 to 8 GHz) with input return loss less than 10 dB throughout the two bands of operation

Quantum Barrier Devices for Sub-Millimetre Wave Detection

Resonant-Tunnelling Diodes (RTDs) are a specific class of Quantum Barrier Devices, which offer a lot of potential for customisation through careful engineering of their semiconductor layer structure. They exhibit characteristics that make them good candidates for use in both subharmonic mixers and signal amplifiers, that operate at millimetre and sub-millimetre frequencies. In this thesis RTDs fabricated at the University of Leeds from three different layer structures are investigated. Initially, device measurements are presented along with a device model for use in circuit simulation software. Planar transmission media circuits were designed for subharmonic mixers and two types of amplifiers, all using these devices. Additional circuits, implemented in waveguide technology, were also studied in preparation for realising the RTD based amplifiers at sub-millimetre and terahertz frequencies. The sub-harmonic mixer circuits were simulated at microwave, millimetre, and sub-millimetre frequencies. Best predicted conversion loss performance is on the order of 20 dB. It was found that amongst the devices used an optimum size exists, offering best trade-off between junction capacitance and current density. The amplifier circuits are divided into two groups, reflection based amplifiers and active transmission line. Their purpose would be to complement the mixers towards eventually building a receiver with low power requirements and low overall conversion loss. The former were found to either exhibit high narrow-band gain, while the latter had low wide-band gain, with an additional, resonant peak at frequencies in the sub-millimetre wave region. The project was primarily a parametric design study, rather than a build and test project. Therefore, the simulation results are used to determine what characteristics of the devices studied would make them suited for use in circuits at high frequencies; and to come up with recommendations for future optimum RTD layer design

Design and characterisation of millimetre wave planar Gunn diodes and integrated circuits

Heterojunction planar Gunn devices were first demonstrated by Khalid et al in 2007. This new design of Gunn device, or transferred electron device, was based on the well-established material system of GaAs as the oscillation media. The design did not only breakthrough the frequency record of GaAs for conventional Gunn devices, but also has several advantages over conventional Gunn devices, such as the possibility of making multiple oscillators on a single chip and compatibility with monolithic integrated circuits. However, these devices faced the challenge of producing high enough RF power for practical applications and circuit technology for integration. This thesis describes systematic work on the design and characterisations of planar Gunn diodes and the associated millimetre-wave circuits for RF signal power enhancement. Focus has been put on improving the design of planar Gunn diodes and developing high performance integrated millimetre-wave circuits for combining multiple Gunn diodes. Improvement of device design has been proved to be one of the key methods to increase the signal power. By introducing additional δ-doping layers, electron concentration in the channel increases and better Gunn domain formation is achieved, therefore higher RF power and frequency are produced. Combining multiple channels in the vertical direction within devices is another effective way to increase the output signal power as well as DC-to-RF conversion efficiency. In addition, an alternative material system, i.e. In0.23Ga0.77As, has also been studied for this purpose. Planar passive components, such as resonators, couplers, low pass filters (LPFs), and power combiners with high performance over 100 GHz have been developed. These components can be smoothly integrated with planar Gunn diodes for compact planar Gunn oscillators, and therefore contribute to RF power enhancement. In addition, several new measurement techniques for characterising oscillators and passive devices have also been developed during this work and will be included in this thesis

Wideband two-dimensional and multiple beam phased arrays and microwave applications using piezoelectric transducers

Modern satellite, wireless communication, and radar systems often demand wideband performance for multi-channel operation and the ability to steer multiple beams for multiple moving targets. This dissertation covers a variety of topics to design low-cost and wideband antenna systems. The main areas of study are microwave devices controlled piezoelectric transducers (PETs) and wideband baluns and balanced microwave circuits using parallel-strip lines. Some focus has also been given to the design of Rotman lens for multiple beam generation and Vivaldi antenna arrays for wideband two-dimensional scanning. The dielectric perturbation technique controlled by PET is introduced to design a wideband phase shifter and a QPSK modulator, and to tune the resonant frequency of a slot dipole. The designed PET-controlled phase shifters are used for beam steering in a dual beam phased array using a bidirectional feeding scheme and a five-beam phased array using a microstrip Rotman lens. Vivaldi-type antennas are commonly used to achieve wideband performance. Very wideband performance can be achieved using an antipodal tapered slot antenna because of its inherent simple wideband transition from microstrip line to parallel-strip line. An antipodal tapered slot antenna and a phased array are designed to span 10 to 35 GHz. In addition, a 4??4 two-dimensional antenna array is designed using wideband antipodal tapered slot antennas, and two sets of PET-controlled phase shifters for E- and H-plane scanning are fabricated to steer the beam. As a microwave system using wideband antenna array, a new low-cost and wideband phased array radar is developed using a modulated pulse over 8 to 20 GHz band. The double-sided parallel-strip line as a balanced line is presented. The parallelstrip line offers much flexibility for microwave circuit designs. This transmission line makes it possible to realize a low impedance line and allows the design of a compact wideband balun and junction. Wideband transitions (or baluns) from parallel-strip line to microstrip line, a typical unbalanced transmission line, are realized to cover several octave bandwidth. Balanced microwave filters and a hybrid coupler are developed using the parallel-strip line

MILLIMETER-WAVE QUADRATURE RECEIVERS FOR ATMOSPHERIC SENSING AND RADIOMETRY

The objective of this research is to investigate the design challenges of millimeter wave (mm-wave) quadrature receivers for emerging applications and develop new ideas to ad- dress these challenges. Next-generation wireless networks, satellite communications, atmospheric sensing instruments, autonomous vehicle radars, and body scanners are targeting to operate at mm-wave frequencies, and high-performance electronics are needed to enable these technologies. In this research, we investigate novel circuit topologies to improve the performance of existing mm-wave quadrature receivers, particularly for radiometry and remote sensing applications. A transformer-based front-end switch is co- designed with an LNA where the transformer acts as the input matching network of the LNA, reducing the front-end loss and system noise figure. Broadband and low-loss quadrature signal generation networks are proposed to provide highly balanced quadrature signals to reject the image frequency content. In addition, a high-efficiency frequency multiplier topology is demonstrated, achieving superior performance compared to the state-of-the-art designs. Lastly, the reliability and noise performance of on-chip noise source devices (PN junctions) in a SiGe BiCMOS platform was characterized and compared. To confirm the advantages of our ideas, the measurement and simulation results of all fabricated circuits are presented and discussed.Ph.D

Modelling of field-effect transistors based on 2D materials targeting high-frequency applications

New technologies are necessary for the unprecedented expansion of connectivity and communications in the modern technological society. The specific needs of wireless communication systems in 5G and beyond, as well as devices for the future deployment of Internet of Things has caused that the International Technology Roadmap for Semiconductors, which is the strategic planning document of the semiconductor industry, considered since 2011, graphene and related materials (GRMs) as promising candidates for the future of electronics. Graphene, a one-atom-thick of carbon, is a promising material for high-frequency applications due to its intrinsic superior carrier mobility and very high saturation velocity. These exceptional carrier transport properties suggest that GRM-based field-effect transistors could potentially outperform other technologies. This thesis presents a body of work on the modelling, performance prediction and simulation of GRM-based field-effect transistors and circuits. The main goal of this work is to provide models and tools to ease the following issues: (i) gaining technological control of single layer and bilayer graphene devices and, more generally, devices based on 2D materials, (ii) assessment of radio-frequency (RF) performance and microwave stability, (iii) benchmarking against other existing technologies, (iv) providing guidance for device and circuit design, (v) simulation of circuits formed by GRM-based transistors.Comment: Thesis, 164 pages, http://hdl.handle.net/10803/40531

A Study on the Performance Enhancement of the Cascode FET Mixer Using New Common-Source and -Drain Configuration

The wireless communication system has become highly developed of late due to the emergence of various communication technologies, and it is becoming more widely used due to the various information requirements of its users. It has the advantages of mobility and accessibility due to easy information acquisition anytime and anywhere. Thus, the characteristics of low power consumption and high performance are required for the effective power management of the wireless communication system. It depends on a battery for system operation, however, whose efficiency and capacity for highly effective power management is still being investigated. Therefore, as the wireless communication system has limited power, it certainly requires effective RF circuits with low power consumption. The goal of this study is to develop a wireless communication system circuit with enhanced RF performance: the cascode FET mixer with new common-source and -drain circuit configuration. For the high performance of a wireless communication system with low power consumption, a well-designed RF circuit is certainly needed due to its large influence on the performance of the whole wireless communication system. If the mixer circuit is well designed, the whole wireless communication system will exhibit high performance. In this thesis, the enhanced-performance cascode FET mixer using new common-source and -drain circuit configuration is proposed. When the cascode FET mixer using new configuration was compared with the conventional one, it was found that the former has the performance of higher conversion gain at a lower input LO power, a very low noise figure, and very high LO-to-IF isolation. Thus, the proposed cascode FET mixer with enhanced RF performance can improve the performance of the wireless communication system, which can realize effective power consumption because of the use of a local oscillator with lower output power. The cascode FET mixer using new configuration was designed in this study based on the results of the simulation and measurement for the verification of the enhanced RF performance. The results showed the mixer’s enhanced RF performance compared with the conventional cascode FET mixer. The proposed new common-source and -drain circuit configuration in the cascode FET mixer is reported in this thesis for the first time. The cascode FET mixer using new configuration showed effective operation by means of the use of a local oscillator with lower output LO power. It also showed higher conversion gain with only the lower input LO power, which does not need a local oscillator with a large output power as it can be operated at lower input LO power compared with the conventional one. This is the important characteristic for the wireless communication system, which requires effective power consumption. The cascode FET mixer using new configuration showed very high LO-to-IF isolation without a LO rejection filter compared with the conventional one. It showed good LO-to-RF isolation. The cascode FET mixer using new configuration also showed a very low noise figure compared with the conventional one. It uses only a FET, which produces the effect to have very low noise figure due to the thermal and shot noise by an active device. The cascode FET mixer using new configuration showed low output IF power and low linearity for the output IF power of the fundamental and third-order intermodulation frequencies, low than those of the conventional one. It also showed the low output IF power spectrum for the intermodulation distortion of the low-side and up-side bands, as opposed to the conventional one. It showed that each reflection coefficients were about -30 dB for the RF frequency of 2.6 GHz, the LO frequency of 2.5 GHz, and the IF frequency of 100 MHz. Through the aforementioned study results, it is exhibited in this thesis that the proposed cascode FET mixer has enhanced RF performance by means of the new common-source and -drain circuit configuration. It can thus achieve high RF performance without an addition to any other circuit, for the enhancement of the RF performance. Especially, the cascode FET mixer using new configuration showed an indispensable circuit, which it must have to improve the efficiency of the wireless communication system due to the mobility and limited power.Chapter 1. Introduction 1 1.1 Background 2 1.2 Method of study 6 Chapter 2. Fundamental Concepts and Definition of Mixer 7 2.1 Definition of linearity and nonlinearity 8 2.2 Definition of frequency generation 13 2.3 Nonlinear phenomena 19 2.4 Definiton of power and gain 24 2.5 Stability 30 2.6 Mixer performance concept 32 Chapter 3. Cascode FET Mixer Design 46 3.1 Nonlinear FET devices 47 3.2 Conventional cascode FET mixer 57 3.3 Cascode FET mixer using new configuration 64 Chapter 4. Simulation and Measurement Results 76 4.1 Comparison of the simulation results 77 4.2 Comparison of the measurement results 95 Chapter 5. Conclusion 103 References 10