Low-power CMOS front-ends for wireless personal area networks

The potential of implementing subthreshold radio frequency circuits in deep sub-micron CMOS technology was investigated for developing low-power front-ends for wireless personal area network (WPAN) applications. It was found that the higher transconductance to bias current ratio in weak inversion could be exploited in developing low-power wireless front-ends, if circuit techniques are employed to mitigate the higher device noise in subthreshold region. The first fully integrated subthreshold low noise amplifier was demonstrated in the GHz frequency range requiring only 260 μW of power consumption. Novel subthreshold variable gain stages and down-conversion mixers were developed. A 2.4 GHz receiver, consuming 540 μW of power, was implemented using a new subthreshold mixer by replacing the conventional active low noise amplifier by a series-resonant passive network that provides both input matching and voltage amplification. The first fully monolithic subthreshold CMOS receiver was also implemented with integrated subthreshold quadrature LO (Local Oscillator) chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage amplification, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling were combined to lower the total power consumption to 2.6 mW. Extremely compact resistive feedback CMOS low noise amplifiers were presented as a cost-effective alternative to narrow band LNAs using high-Q inductors. Techniques to improve linearity and reduce power consumption were presented. The combination of high linearity, low noise figure, high broadband gain, extremely small die area and low power consumption made the proposed LNA architecture a compelling choice for many wireless applications.Ph.D.Committee Chair: Laskar, Joy; Committee Member: Chakraborty, Sudipto; Committee Member: Chang, Jae Joon; Committee Member: Divan, Deepakraj; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanoui

300 GHz broadband transceiver design for low-THz band wireless communications in indoor internet of things

© 2017 IEEE. This paper presents the architectural design of a 300 GHz transceiver system that can be used to explore the high speed communication opportunities offered by the Terahertz (THz) band for advanced applications of Internet-of-Things (IoT). We use low cost industry ready components to prepare a fully customizable THz band communication system that provides a bandwidth of 20 GHz that is easily extendable up to 40 GHz. Component parameters are carefully observed and used in simulations to predict the system performance while the compatibility of different components is ensured to produce a reliable design. Our results show that the receiver provides a conversion gain of 51 dB with a noise figure (NF) of 9.56 dB to achieve a data rate of 90.31 Gbps at an operation range of 2 meters, which is suitable for high speed indoor IoT nodes. The flexible design of the transceiver provides groundwork for further research efforts in 5G IoT applications and pushing boundaries of throughputs to the order of terabits per second (Tbps)

A coupled-line balun for ultra-wideband single-balanced diode mixer

A multi-section coupled-line balun design for an ultra-wideband diode mixer is presented in this paper. The multi-section coupled-line balun was used to interface with the diode mixer in which it can deliver a good impedance matching between the diode mixer and input/output ports. The mixer design operates with a Local Oscillator (LO) power level of 10 dBm, Radio Frequency (RF) power level of -20 dBm and Intermediate Frequency (IF) of 100 MHz with the balun characteristic of 180° phase shift over UWB frequency (3.1 to 10.6 GHz), the mixer design demonstrated a good conversion loss of -8 to -16 dB over the frequency range from 3.1 to 10.6 GHz. Therefore, the proposed multi-section coupled-line balun for application of UWB mixer showed a good isolation between the mixer’s ports

A Novel 183GHz Subharmonic Schottky Diode Mixer

PhDThe technique of microwave . limb sounding -from space represents a very powerful tool for determining the atmospheric processes involved in ozone depletion, the greenhouse effect, acid rain, etc.. Unfortunately, the technology involved in producing millimetric and submillimetric devices is highly complex, and miniature. The power levels and environmental conditions existing aboard spacecraft in present 'use, 5 differ from those required by the low noise heterodyne receivers employed by the Radio Astronomy community. Therefore, great effort has been spent in the design of radiometers with limited power and weight requirements, so that they can withstand the rigours of launch and operation in space. This thesis describes the design and construction of a subharmonically pumped, double diode mixer which is now used in an airborne atmospheric radiometer. The mixer power requirement and rugged nature make it an ideal option for space operation. The assembly of the millimetric circuit required the development, of novel techniques which enabled the incorporation of discrete circuit elements onto a single quartz substrate. This allowed the physical testing of the millimetric circuit independently of the RF block. A detailed investigation into the `whiskering' technique was carried out. It was thus possible to pinpoint errors that had previously occurred in assembly and which had resulted in the failure of a space flight device. With the adoption of quantified procedures, devices constructed using the `whiskering' technique were shown to be considerably more resilient than had previously been thought. The performance of the mixer is comparable with other designs using Schottky diodes at room temperature (-1200K DSB) and the local oscillator power requirement is easily met with a single solid state source. A simple theoretical analysis using the Seigel and Kerr program was undertaken in conjunction with RF measurements performed on a 65X scale model to determine steps required for further improvement.Marconi Space Systems. United Kingdom Meteorological Office and the SER

Développement d'une architecture innovante de récepteur radar à 77 GHz et démonstration en CMOS 28 nm FDSOI

Grâce à sa capacité à détecter des cibles éloignées malgré une mauvaise visibilité, le radar automobile à 77 GHz joue un rôle important dans l'aide à la conduite. L'utilisation des fréquences millimétriques offre une bonne résolution et une importante capacité d'intégration des circuits. C'est aussi un défi car il faut satisfaire un cahier des charges exigeant sur le bruit et la linéarité du récepteur. Les technologies SiGe BiCMOS ont été les premières utilisées pour la conception de récepteurs radar à 77 GHz. De bons résultats ont été obtenus en se basant sur des architectures utilisant des mélangeurs actifs. Cependant l'utilisation des technologie BiCMOS se traduisait par une consommation élevée, une faible capacité d'intégration et des coûts de production importants. Récemment, l'intégration des procédés CMOS menant à l'augmentation des fréquences de transition rend ces technologies plus attractives pour les applications nécessitant un faible coût et la cointégration de plusieurs fonctions au sein d'une même puce. La littérature sur les récepteurs radars en technologie CMOS à 77 GHz montre que les architectures inspirées par les technologies BiCMOS ne sont pas pertinentes pour cette application. Le but de cette thèse et de montrer que l'utilisation de techniques propres aux technologie CMOS comme l'échantillonnage et l'utilisation de portes logiques permet d'obtenir de très bonnes performances. Dans ce travail, deux nouvelles architectures de récepteurs radars basées sur le principe d'échantillonnage sont proposées. La première architecture est basée sur un mélangeur passif échantillonné qui permet d'obtenir un très bon compromis bruit/linéarité. La seconde exploite les propriétés des mélangeurs sous-échantillonnés afin utiliser une fréquence d'OL trois fois inférieure à la fréquence RF offrant ainsi de très intéressantes simplifications au niveau de la chaîne de distribution du signal d'OL du récepteur. Le contexte de cette étude est expliqué dans le 1er chapitre qui présente les exigences de conception liées à l'application radar et fourni une analyse de l'état de l'art des récepteurs à 77 GHZ. Le chapitre suivant décrit le principe de fonctionnement et l'implémentation d'un mélangeur échantillonné à 77 GHz en technologie CMOS 28- nm FDSOI. Une topologie de mélangeur sous-échantillonné utilisant une fréquence d'OL de 26 GHz pour convertir des signaux RF autour de 77 GHz est ensuite détaillée dans le chapitre 3. Le chapitre 4 conclut cette étude en détaillant l'intégration des mélangeurs étudiés dans les chapitres précédents avec un amplificateur faible bruit dans différents récepteurs radars. Ces architectures de récepteurs basées sur l'échantillonnage sont ensuite comparées entre elles et avec l'état de l'art montrant ainsi leurs avantages et inconvénients. Les résultats de cette comparaison confirment l'intérêt des techniques d'échantillonnage pour la conversion de fréquence dans le cadre de l'application radar.With its ability to detect distant targets under harsh visibility conditions, the 77 GHz automotive radar plays a key role in driving safety. Using mm-wave frequencies allow a good range resolution, a better circuit integration and a wide modulation bandwidth. This is also a challenge for circuit designers who must fulfill stringent requirements especially on the receiver front-end. First 77 GHz radar receivers were manufactured with SiGe BiCMOS processes benefiting from the high transition frequency and high breakdown voltage of Hetero-junction Bipolar Transistors (HBT). Good results have been achieved with active-mixer-based architectures, but these technologies suffer from high power consumptions, limited integration capacity and large production cost. More recently, the scaling down of CMOS processes (coming together with the increase of the transition frequency of the transistors) makes CMOS a good candidate for 77 GHz circuit design, especially when cost target requires single chip solutions. The literature related to CMOS radar receivers highlights that receivers based on BiCMOS architectures generally show poor performances. The aim of this work is to demonstrate that using CMOS specific technics such as sampling and the use of high-speed digital gates should enhance the performance of the receivers. In this work, two innovative radar receiver architectures based on the sampling principle are proposed. The first one shows that this principle can be extended to millimeter wave frequencies to benefit from a very good noise/linearity trade-off. While the second one uses this principle to converts a 77 GHz RF signal by using a 26 GHz LO frequency thus simplifying the LO distribution chain of the receiver. The background of this study is introduced in the chapter 1 presenting the design trade-off related to the 77 GHz radar receiver and provides a review of the existing solutions. The following chapter describes the sampling mixer principle and the implementation of a 77 GHz sampling mixer in 28-nm FDSOI CMOS technology. Then, a sub- sampling mixer topology allowing to convert an RF signal around 77 GHz using a 26 GHz LO frequency is detailed in the chapter 3. The chapter 4 draws the conclusion of this study by showing the implementation of the two proposed sampling-based mixers with a low noise amplifier in 77 GHz front ends. These receiver architectures are compared with the state of the art highlighting the strengths and weaknesses of the proposed solutions. The results of this study demonstrates that using sampling for down conversion can be convenient to address millimeter-wave frequency applications

Ultra low power mixer with out-of-band RF energy harvesting for wireless sensor networks applications

An ultra low power mixer with out-of-band radio frequency (RF) energy harvesting suitable for the wireless sensors network (WSN) application is proposed in this paper. The presented mixer is able to harvest the out-of-band RF energy and keep it working in ultra low power condition and extend the battery life of the WSN. The mixer is designed and simulated with Global Foundries ’ 0.18 μ m CMOS RF process, and it operates at 2.4GHz industrial, scientific, and medical (ISM) band. The Cadence IC Design Tools post-layout simulation results demonstrate that the proposed mixer consumes 248 μ W from a 1V supply voltage. Furthermore, the power consumption can be reduced to 120.8 μ W by the out-of-band RF energy harvesting rectifier

Submillimeter wave detection with superconducting tunnel diodes

Superconductor-Insulator-Superconductor (SIS) diodes are the detector elements in the most sensitive heterodyne receivers available from 100 to 500 GHz. SIS mixers are the front end of radio astronomical systems around the world. SIS mixer technology is being extended to 1 THz and higher frequencies for eventual use on spaceborne astronomical experiments. Here is a short review of submillimeter SIS mixers. The role of impedance matching in the proper design of an SIS mixer is described. A variety of methods for achieving good impedance match at submillimeter frequencies are presented. The experimental state of the submillimeter SIS mixer art is described and summarized

A reconfigurable low-voltage and low-power millimeter-wave dual-band mixer in 65-nm CMOS

ABSTRACT: In this paper, we propose, investigate, and demonstrate a reconfigurable low-voltage and low-power millimeter-wave mixer in a 65-nm CMOS, which can be switched as either a subharmonic mixer (SHM) or a fundamental mixer (FM) for the dual-band applications. Based on a modified Gilbert mixer topology, the proposed CMOS mixer can operate at a low supply voltage and low local oscillator (LO) pumping power while providing good performance in both SHM and FM modes. To the best of our knowledge, this is the first reported Gilbert SHM based on the stacked switching quads in a low-voltage CMOS technology. Under 1-V supply voltage and -3-dBm LO pumping power, the measured conversion gain (CG) of the proposed CMOS mixer is -4.8 ± 1.5 dB from 34 to 56 GHz and -0.1 ± 1.5 dB from 17 to 43 GHz in the SHM and FM modes, respectively. The measured double-sideband (DSB) noise figure (NF) is 18.5-20 dB from 37 to 49 GHz and 12.4-14 dB from 17 to 35 GHz in the SHM and FM modes, respectively. The measured input third-order intercept point (IIP3) is 2.9 and 3.4 dBm, respectively, for the SHM and FM modes at the LO frequency of 22 GHz. In addition, the total dc power consumption of the proposed mixer including output buffers is 7 mW in both the operation modes

Low-power transceiver design for mobile wireless chemical biological sensors

The design of a smart integrated chemical sensor system that will enhance sensor performance and compatibility to Ad hoc network architecture remains a challenge. This work involves the design of a Transceiver for a mobile chemical sensor. The transceiver design integrates all building blocks on-chip, including a low-noise amplifier with an input-matching network, a Voltage Controlled Oscillator with injection locking, Gilbert cell mixers, and a Class E Power amplifier making it as a single-chip transceiver. This proposed low power 2GHz transceiver has been designed in TSMC 0.35~lm CMOS process using Cadence electronic design automation tools. Post layout HSPICE simulation indicates that Design meets the separation of noise levels by 52dB and 42dB in transmitter and receiver respectively with power consumption of 56 mW and 38 mW in transmit and receive mode