170 research outputs found

    Improved Frequency Domain Architecture for the Digital Block of a Hardware Simulator for MIMO Radio Channels

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    International audienceThis paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for UMTS and WLAN applications in indoor and outdoor environments. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA, and its accuracy is analyzed

    Enabling High-fidelity Ultra-wideband Radio Channel Emulation:Band-stitching and Digital Pre-distortion Concepts

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    Hardware Simulator Design for MIMO Propagation Channel on Shipboard at 2.2 GHz

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    27 pagesInternational audienceA wireless communication system can be tested either in actual conditions or with a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired radio channel, making it possible to test "on table" mobile radio equipments. This paper presents new architectures for the digital block of a hardware simulator ofMIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architectures of the digital block of the simulator for shipboard environment are presented. A hardware simulator must reproduce the behavior of the radio propagation channel. Thus, ameasurements campaign has been conducted to obtain the impulse responses of the shipboard channel using a channel sounder designed and realized at IETR. After the presentation of the channel sounder, the channel impulse responses are described and implemented. Then, the new architectures of the digital block of the hardware simulator, implemented on a Xilinx Virtex-IV FPGA are presented. The accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

    MIMO Hardware Simulator: New Digital Block Design in Frequency Domain for Streaming Signals

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    11 pagesInternational audienceThis paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. It accepts signals in streaming mode. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA. It is tested with time-varying 3GPP TR 36.803 channel model EVA and TGn channel model E. Finally, its accuracy is analyzed

    Hardware Simulator: Digital Block Design for Time- Varying MIMO Channels with TGn Model B Test

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    International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. Thus, it makes possible to ensure the same test conditions in order to compare the performance of various equipments. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with WLAN 802.11ac standard, in indoor environment, using time-varying TGn 802.11n channel model B. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed

    MIMO Hardware Simulator Using Standard Channel Models and Measurement Data at 2.2 and 3.5 GHz

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    20 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents architectures for the digital block of a hardware simulator of MIMO (multiple-input multiple-output) propagation channels. This simulator can be used for LTE (long term evolution system) and WLAN (wireless local area networks) 802.11ac applications, in indoor and outdoor environments. The first architecture is appropriate for shipboard environments, while the second corresponds to outdoor-to-indoor environments and considers the wave propagation penetration within buildings. Measurements campaigns carried out at 2.2 and 3.5 GHz have been conducted to obtain the impulse responses of the channel using a MIMO channel sounder designed at IETR. The measurements are processed with an algorithm extracting the dominant paths. The architectures of the digital block are implemented on a Xilinx Virtex-IV FPGA (field programmable gate array). After the implementation of the impulse responses, the accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

    FPGA based technical solutions for high throughput data processing and encryption for 5G communication: A review

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    The field programmable gate array (FPGA) devices are ideal solutions for high-speed processing applications, given their flexibility, parallel processing capability, and power efficiency. In this review paper, at first, an overview of the key applications of FPGA-based platforms in 5G networks/systems is presented, exploiting the improved performances offered by such devices. FPGA-based implementations of cloud radio access network (C-RAN) accelerators, network function virtualization (NFV)-based network slicers, cognitive radio systems, and multiple input multiple output (MIMO) channel characterizers are the main considered applications that can benefit from the high processing rate, power efficiency and flexibility of FPGAs. Furthermore, the implementations of encryption/decryption algorithms by employing the Xilinx Zynq Ultrascale+MPSoC ZCU102 FPGA platform are discussed, and then we introduce our high-speed and lightweight implementation of the well-known AES-128 algorithm, developed on the same FPGA platform, and comparing it with similar solutions already published in the literature. The comparison results indicate that our AES-128 implementation enables efficient hardware usage for a given data-rate (up to 28.16 Gbit/s), resulting in higher efficiency (8.64 Mbps/slice) than other considered solutions. Finally, the applications of the ZCU102 platform for high-speed processing are explored, such as image and signal processing, visual recognition, and hardware resource management

    Hardware simulator design for LTE applications with time-varying MIMO channels

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    International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with LTE standard, in outdoor environment, using time-varying channels. The new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed. The result shows that the architectures produce low occupation on the FPGA and have a small relative error of the output signals

    Simulateur matériel du canal de propagation MIMO pour les environnements extérieurs et hétérogènes

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    4 pagesNational audienceUn simulateur matériel permet de reproduire un canal radio souhaité, ce qui permet de tester au laboratoire divers systèmes de radiocommunications mobiles. Cet article présente l'architecture du bloc numérique du simulateur pour simuler un scénario à l'extérieur. Un changement des environnements est nécessaire pour simuler le canal de propagation d'une manière continue. Ce scénario consiste par exemple à suivre une personne qui utilise son téléphone portable et qui se déplace d'abord en voiture, d'un environnement urbain vers un environnement rural, puis pedestre. Les réponses impulsionnelles du canal peuvent être obtenues à l'aide d'un sondeur de canal MIMO. Cependant, dans cet article, nous allons utiliser les modèles de canal LTE standardisés. L'architecture proposée est mise en oeuvre sur un FPGA Virtex-IV. La précision, l'occupation sur le FPGA et la latence de cette architecture sont analysées
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