Design and performance analysis of human body communication digital transceiver for wireless body area network applications

Wireless body area network (WBAN) is a prominent technology for resolving health-care concerns and providing high-speed continuous monitoring and real-time help. Human body communication (HBC) is an IEEE 802.15.6 physical layer standard for short-range communications that is not reliant on radio frequency (RF). Most WBAN applications can benefit from the HBC's low-latency and low-power architectural features. In this manuscript, an efficient digital HBC transceiver (TR) hardware architecture is designed as per IEEE 802.15.6 standard to overcome the drawbacks of the RF-wireless communication standards like signal leakage, on body antenna and power consumption. The design is created using a frequency selective digital transmission scheme for transmitter and receiver modules. The design resources are analyzed using different field programmable gate array (FPGA) families. The HBC TR utilizes <1% slices, consumes 101 mW power, and provides a throughput of 24.31 Mbps on Artix-7 FPGA with a latency of 10.5 clock cycles. In addition, the less than 10-4bit error rate of HBC is achieved with a 9.52 Mbps data rate. The proposed work is compared with existing architectures with significant improvement in performance parameters like chip area, power, and data rate

無線センサネットワークのための超低消費電力と高感度CMOS RF受信機に関する研究

Wireless sensor networks (WSN) have been applied in wide range of applications and proved the more and more important contribution in the modern life. In order to evaluate a WSN, many metrics are considered such as cost, latency, power or quality of service. However, since the sensor nodes are usually deployed in large physical areas and inaccessible locations, the battery change becomes impossible. In this scenario, the power consumption is the most important metric. In a sensor node, the RF receiver is one of the communication devices, which consume a vast majority of power. Therefore, this thesis studies ultra low power RF receivers for the long lifetime of the sensor nodes. Currently, the WSNs use various frequency bands. However, for low power target, the sub-GHz frequency bands are preferred. In this study, ultra-low power 315 MHz and 920 MHz receivers will be proposed for short-range applications and long-range applications of the WSNs respectively. To achieve ultra-low power target, the thesis considers some issues in architecture, circuit design and fabrication technology for suitable choices. After considering different receiver architectures, the RF detection receiver with the On-Off-Keying (OOK) modulation is chosen. Then the thesis proposes solutions to reduce power consumption and concurrently guarantee high sensitivity for the receivers so that they can communicate at adequate distances for both short and long-range applications. First, a 920 MHz OOK receiver is designed for the long-range WSN applications. Typically, the RF amplifiers and local oscillators consume the most of power of RF receivers. In the RF detection receivers, the local oscillators are eliminated, however, the power consumption of the RF amplifiers is still dominant. By reducing the RF gain or removing the RF amplifier, the power consumption of the receivers can be reduced drastically. However, in this case the sensitivity is very limited. In order to overcome the trade-off between power consumption and sensitivity, the switched bias is applied to the RF amplifiers to reduce their power consumption substantially while guaranteeing high RF gain before RF detection. As a result, the receiver consumes only 53 W at 0.6 V supply with -82 dBm sensitivity at 10 kbps data rate. Next, an OOK receiver operating at 315 MHz for the short-range WSN applications with low complexity is proposed. In this receiver, the RF amplifier is controlled to operate intermittently for power reduction. Furthermore, taking advantage of the low carrier frequency, a comparator is used to convert the RF signal to a rail-to-rail stream and then data is demodulated in the digital domain. Therefore, no envelope detector or baseband amplifiers is required. The architecture of the receiver is verified by using discrete RF modules and FPGAs before it is designed on CMOS technology. By simulation with the physical layout, the 315 MHz OOK receiver consumes 27.6 W at 200 kbps and achieves -76.4 dBm sensitivity. Finally, the Synchronized-OOK (S-OOK) modulation scheme is proposed and then an S-OOK receiver operating in the 315 MHz frequency is developed to reduce power consumption more deeply. The S-OOK signal contains not only data but also clock information. By generating a narrow window, the RF front-end is enabled to receive signal only in a short period, therefore, power consumption of the receiver is reduced further. In addition, thank to the clock information contained in the input signal, the data and corresponding clock are demodulated simultaneously without a clock and data recovery circuit. The architecture of the S-OOK receiver is also verified by using discrete RF modules and FPGAs, then VLSI design is carried out. Physical layout simulation shows that the receiver can achieve -76.4 dBm sensitivity, consumes 8.39 W, 4.49 W, 1.36 W at 100 kbps, 50 kbps and 10 kbps respectively. In conclusion, with the objective is to look for solutions to minimize power consumption of receivers for extending the lifetime of sensor nodes while guaranteeing high sensitivity, this study proposed novel receiver architectures, which help reduce power consumption significantly. If using the coin battery CR2032 for power supply, the 920 MHz OOK receiver can work continuously in 1.45 years with communication distance of 259 meters; the 315 MHz OOK receivers can work continuously in 2.8 years with approximately 19 meters communication distance in free space. Whereas, the 315 MHz S-OOK receiver with the minimum power consumption of 1.36 W is suitable for batteryless sensor nodes.電気通信大学201

Performance evaluation of wake-up radio based wireless body area network

Abstract. The last decade has been really ambitious in new research and development techniques to reduce energy consumption especially in wireless sensor networks (WSNs). Sensor nodes are usually battery-powered and thus have very limited lifetime. Energy efficiency has been the most important aspect to discuss when talking about wireless body area network (WBAN) in particular, since it is the bottleneck of these networks. Medium access control (MAC) protocols hold the vital position to determine the energy efficiency of a WBAN, which is a key design issue for battery operated sensor nodes. The wake-up radio (WUR) based MAC and physical layer (PHY) have been evaluated in this research work in order to contribute to the energy efficient solutions development. WUR is an on-demand approach in which the node is woken up by the wake-up signal (WUS). A WUS switches a node from sleep mode to wake up mode to start signal transmission and reception. The WUS is transmitted or received by a secondary radio transceiver, which operates on very low power. The energy benefit of using WUR is compared with conventional duty-cycling approach. As the protocol defines the nodes in WUR based network do not waste energy on idle listening and are only awakened when there is a request for communication, therefore, energy consumption is extremely low. The performance of WUR based MAC protocol has been evaluated for both physical layer (PHY) and MAC for transmission of WUS and data. The probabilities of miss detection, false alarm and detection error rates are calculated for PHY and the probabilities of collision and successful data transmission for channel access method Aloha is evaluated. The results are obtained to compute and compare the total energy consumption of WUR based network with duty cycling. The results prove that the WUR based networks have significant potential to improve energy efficiency, in comparison to conventional duty cycling approach especially, in the case of low data-reporting rate applications. The duty cycle approach is better than WUR approach when sufficiently low duty cycle is combined with highly frequent communication between the network nodes

Architecture for ultra-low power multi-channel transmitters for Body Area Networks using RF resonators

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 99-103).Body Area Networks (BANs) are gaining prominence for their use in medical and sports monitoring. This thesis develops the specifications of a ultra-low power 2.4GHz transmitter for use in a Body Area Networks, taking advantage of the asymmetric energy constraints on the sensor node and the basestation. The specifications include low transmit output powers, around -10dBm, low startup time, simple modulation schemes of OOK, FSK and BPSK and high datarates of 1Mbps. An architecture that is suited for the unique requirements of transmitters in these BANs is developed. RF Resonators, and in particular Film Bulk Acoustic Wave Resonators (FBARs) are explored as carrier frequency generators since they provide stable frequencies without the need for PLLs. The frequency of oscillation is directly modulated to generate FSK. Since these oscillators have low tuning range, the architecture uses multiple resonators to define the center frequencies of the multiple channels. A scalable scheme that uses a resonant buffer is developed to multiplex the oscillators' outputs to the Power Amplifier (PA). The buffer is also capable of generating BPSK signals. Finally a PA optimized for efficiently delivering the low output powers required in BANs is developed. A tunable matching network in the PA also enables pulse-shaping for spectrally efficient modulation. A prototype transmitter supporting 3 FBAR-oscillator channels in the 2.4GHz ISM band was designed in a 65nm CMOS process. It operates from a 0.7V supply for the RF portion and 1V for the digital section. The transmitter achieves 1Mbps FSK, up to 10Mbps for OOK and BPSK without pulse shaping and 1Mbps for OOK and BPSK with pulse shaping. The power amplifier has an efficiency of up to 43% and outputs between -15dBm and -7.5dBm onto a 50Q antenna. Overall, the transmitter achieves an efficiency of upto 26% and energy per bit of 483pJ/bit at 1Mbps.by Arun Paidimarri.S.M

Low Power Circuit Design in Sustainable Self Powered Systems for IoT Applications

The Internet-of-Things (IoT) network is being vigorously pushed forward from many fronts in diverse research communities. Many problems are still there to be solved, and challenges are found among its many levels of abstraction. In this thesis we give an overview of recent developments in circuit design for ultra-low power transceivers and energy harvesting management units for the IoT. The first part of the dissertation conducts a study of energy harvesting interfaces and optimizing power extraction, followed by power management for energy storage and supply regulation. we give an overview of the recent developments in circuit design for ultra-low power management units, focusing mainly in the architectures and techniques required for energy harvesting from multiple heterogeneous sources. Three projects are presented in this area to reach a solution that provides reliable continuous operation for IoT sensor nodes in the presence of one or more natural energy sources to harvest from. The second part focuses on wireless transmission, To reduce the power consumption and boost the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator employed as the local oscillator generator scheme. In combination with an edge-combiner power amplifier, the Tx showed a measured energy efficiency of 0.2 nJ=bit and a normalized energy efficiency of 3.1 nJ=bit:mW when operating at output power levels up to -10 dBm and data rates of 3 Mbps

Ultra-Wideband Transceiver with Error Correction for Cortical Interfaces in NanometerCMOS Process

This dissertation reports a high-speed wideband wireless transmission solution for the tight power constraints of cortical interface application. The proposed system deploysImpulse Radio Ultra-wideband (IR-UWB) technique to achieve very high-rate communication. However, impulse radio signals suffer from significant attenuation within the body,and power limitations force the use of very low-power receiver circuits which introduce additional noise and jitter. Moreover, the coils’ self-resonance has to be suppressed to minimize the pulse distortion and inter-symbol interference, adding significant attenuation. To compensate these losses, an Error correction code (ECC) layer is added for functioning reliably to the system. The performance evaluation is made by modeling a pair of physically fabricated coils, and the results show that the ECC is essential to obtain the system’s reliability. Furthermore, the gm/ID methodology, which is based on the complete exploration ofall inversion regions that the transistors are biased, is studied and explored for optimizingthe system at the circuit-level. Specific focuses are on the RF blocks: the low noise am-plifier (LNA) and the injection-locked voltage controlled oscillator (IL-VCO). Through the analytical deduction of the circuit’s features as the function of the gm/ID for each transistor, it is possible to select the optimum operating region for the circuit to achieve the target specification. Other circuit blocks, including the phase shifter, frequency divider,mixer, etc. are also described and analyzed. The prototype is fabricated in a 65-nm CMOS(Complementary Metal-Oxide-Semiconductor) process

Designing Flexible, Energy Efficient and Secure Wireless Solutions for the Internet of Things

The Internet of Things (IoT) is an emerging concept where ubiquitous physical objects (things) consisting of sensor, transceiver, processing hardware and software are interconnected via the Internet. The information collected by individual IoT nodes is shared among other often heterogeneous devices and over the Internet. This dissertation presents flexible, energy efficient and secure wireless solutions in the IoT application domain. System design and architecture designs are discussed envisioning a near-future world where wireless communication among heterogeneous IoT devices are seamlessly enabled. Firstly, an energy-autonomous wireless communication system for ultra-small, ultra-low power IoT platforms is presented. To achieve orders of magnitude energy efficiency improvement, a comprehensive system-level framework that jointly optimizes various system parameters is developed. A new synchronization protocol and modulation schemes are specified for energy-scarce ultra-small IoT nodes. The dynamic link adaptation is proposed to guarantee the ultra-small node to always operate in the most energy efficiency mode, given an operating scenario. The outcome is a truly energy-optimized wireless communication system to enable various new applications such as implanted smart-dust devices. Secondly, a configurable Software Defined Radio (SDR) baseband processor is designed and shown to be an efficient platform on which to execute several IoT wireless standards. It is a custom SIMD execution model coupled with a scalar unit and several architectural optimizations: streaming registers, variable bitwidth, dedicated ALUs, and an optimized reduction network. Voltage scaling and clock gating are employed to further reduce the power, with a more than a 100% time margin reserved for reliable operation in the near-threshold region. Two upper bound systems are evaluated. A comprehensive power/area estimation indicates that the overhead of realizing SDR flexibility is insignificant. The benefit of baseband SDR is quantified and evaluated. To further augment the benefits of a flexible baseband solution and to address the security issue of IoT connectivity, a light-weight Galois Field (GF) processor is proposed. This processor enables both energy-efficient block coding and symmetric/asymmetric cryptography kernel processing for a wide range of GF sizes (2^m, m = 2, 3, ..., 233) and arbitrary irreducible polynomials. Program directed connections among primitive GF arithmetic units enable dynamically configured parallelism to efficiently perform either four-way SIMD GF operations, including multiplicative inverse, or a long bit-width GF product in a single cycle. This demonstrates the feasibility of a unified architecture to enable error correction coding flexibility and secure wireless communication in the low power IoT domain.PHDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137164/1/yajchen_1.pd

A survey on wireless body area networks for eHealthcare systems in residential environments

The progress in wearable and implanted health monitoring technologies has strong potential to alter the future of healthcare services by enabling ubiquitous monitoring of patients. A typical health monitoring system consists of a network of wearable or implanted sensors that constantly monitor physiological parameters. Collected data are relayed using existing wireless communication protocols to the base station for additional processing. This article provides researchers with information to compare the existing low-power communication technologies that can potentially support the rapid development and deployment of WBAN systems, and mainly focuses on remote monitoring of elderly or chronically ill patients in residential environments

Ultra Wideband

Ultra wideband (UWB) has advanced and merged as a technology, and many more people are aware of the potential for this exciting technology. The current UWB field is changing rapidly with new techniques and ideas where several issues are involved in developing the systems. Among UWB system design, the UWB RF transceiver and UWB antenna are the key components. Recently, a considerable amount of researches has been devoted to the development of the UWB RF transceiver and antenna for its enabling high data transmission rates and low power consumption. Our book attempts to present current and emerging trends in-research and development of UWB systems as well as future expectations

Study and design of an impulse radio UWB synthesizer for 3.1-10.6 GHz band in 28 NM CMOS FD-SOI technology

Orientador: Prof. Ph.D. André Augusto MarianoCoorientador: Prof. Ph.D. Rémy VaucheDissertação (mestrado) - Universidade Federal do Paraná, Setor de Tecnologia, Programa de Pós-Graduação em Engenharia Elétrica. Defesa : Curitiba, 21/03/2022Inclui referências: p. 107-110Resumo: Este trabalho de dissertação de mestrado apresenta o estudo e desenvolvimento de sintetizador de pulsos de radio ultra banda larga para a banda 3,1-10,6 GHz em tecnologia 28 nm CMOS FD-SOI. A primeira utilização dessa banda de frequência foi autorizada pela comissão federal de comunicações dos Estados Unidos em 2002. Visando a explorar essa banda de frequência, o padrão IEEE 802.15.4 escolheu as comunicações baseadas em pulsos de radio em detrimento das comunicações tradicionais de banda estreita. Uma linha importante de pesquisa e o estudo e desenvolvimento de um transmissor ultra banda larga, capaz de endereçar múltiplas bandas e múltiplos padrões diferentes, que e consistido em um sintetizador de pulsos de radio devendo ter a capacidade de cobrir a banda 3,1-10,6 GHz. Para atingir tal objetivo, visa-se a implementação de uma arquitetura versátil baseada em um gerador de pulsos constituído principalmente por um oscilador controlado por tensão, e um circuito de formatação da envoltória do pulso, em que e possível fazer ajuste da duração e da frequência central dos pulsos, e compensar variações PVT (Processo, Tensão e Temperatura). O objetivo principal deste trabalho de dissertação de mestrado e estudo e desenvolvimento de um sintetizador de pulsos baseado nessa arquitetura em tecnologia 28 nm CMOS FD-SOI, de maneira que esse circuito seja capaz de cobrir toda banda 3.1-10.6 GHz e ao mesmo tempo cumprir os requerimentos espectrais estabelecidos pelos padrões IEEE 802.15.4 e IEEE 802.15.6. No projeto do circuito proposto, utilizou-se a técnica de síntese de pulso por transposição de frequência, constituído principalmente por um oscilador local comutado, permitindo a redução do consumo de energia, em que o sinal produzido pelo oscilador e modulado por um pulso em banda base. Em relação a metodologia do projeto, trata-se de um projeto totalmente personalizado, em que se utilizou as logicas CMOS e CML (Logica Diferencial), e se considerou capacitâncias parasitas estimadas no intuito de melhorar o dimensionamento dos transistores. A arquitetura do oscilador escolhida neste projeto foi o oscilador em anel, a qual permite de se obter uma banda de frequência suficientemente alta. Acerca da formatação do pulso, escolheu-se uma envoltória possível de se implementar com circuito digital reprogramável, visando a endereçar os diferentes canais do padrão IEEE 802.15.4 e IEEE 802.15.6. O sistema implementado, em nível de esquemático de transistor considerando capacitâncias parasitas estimadas, apresenta um desempenho satisfatório sobre a toda a banda de frequência de interesse, em que os pulsos gerados respeitam os gabaritos espectrais impostos pelos padrões IEEE, evidenciando a capacidade do circuito prosposto de ser multi-banda e cobrir toda a banda de frequência de interesse. Em relação ao consumo de potência, esse e influenciado pela duração do pulso e sua frequência central. Ademais, obteve-se um consumo de potencia estática 14 µW e um consumo de energia por pulso emitido máximo de 308 pJ, em que para esse caso, o pulso apresenta um energia transmitida de 11,7 pJ por pulso, assim apresentando uma eficiência de 3,8 %.Abstract: This dissertation work concerns the study and design of an impulse radio ultra-wide band synthesizer for 3.1-10.6 GHz frequency band in 28 nm CMOS FD-SOI technology. Indeed, this frequency band exploitation was initially authorized by the federal communications commission of United States in 2002. Targeting to exploit this frequency band, the IEEE 802.15.4 standard has chosen the communications based on impulse radio instead of the traditional narrowband communications. Besides, the impulse radio communications should respect communications standards, like the IEEE 802.15.4 for wireless personal networks, or IEEE 802.15.6 for wireless body networks. These IEEE standards define the generated pulse bandwidth and its central frequency. An important line of research is the study and design of a multi-standard or multi-band UWB transmitter, consisted by a pulse synthesizer that should be able to address all the standardized channels. To accomplish this, a proposed solution reposes on design of versatile architecture based on pulse generator and an envelope shaping circuit, where it is possible to tune the pulse duration and central frequency, and also to compensate PVT variations (Process, Voltage and Temperature). The dissertation work main goal is the study and design of a pulse synthesizer based on this architecture in 28 nm CMOS FD-SOI technology, such that the designed system is capable to cover all the 3.1-10.6 GHz and at same time to comply the spectral requirements established by IEEE 802.15.4 and 802.15.6 standards. In relation of the proposed circuit design, it is applied the pulse synthesis technique based on frequency transposition, that is mainly composed by a local oscillator that can be turned on and off, which allows to reduce the power consumption. The generated oscillation is modulated by a baseband pulse. Concerning the design methodology, it is a full-custom project, where CMOS and CML logics were used, and estimated parasitic capacitances were considered to achieve more reliable transistor sizing. The oscillator architecture chosen is based on ring oscillator, which allows to reach a frequency range sufficiently large. For the pulse shaping, it was chosen a envelope that is feasible to implement with fully digital circuit, targeting to address all IEEE 802.15.4 and IEEE 802.15.6 standard channels. The implemented system presents, in schematic levels considering parasitic capacitances, a satisfactory performance over all the 3.1-10.6 GHz band, where the generated pulses respect the spectral requirements imposed by the IEEE standards, therefore indicating that the proposed circuit is multi-band and able to cover all frequency band of interest. In terms of power consumption, it was achieved a power leakage of 14 µW and a maximal energy per pulse consumption of 308 pJ, where for this case, the pulse has an emitted energy of 11.7 pJ per pulse, therefore a efficiency of 3.8 %