The road to fully integrated DC-DC conversion via the switched-capacitor approach

This paper provides a perspective on progress toward realization of efficient, fully integrated dc-dc conversion and regulation functionality in CMOS platforms. In providing a comparative assessment between the inductor-based and switched-capacitor approaches, the presentation reviews the salient features in effectiveness in utilization of switch technology and in use and implementation of passives. The analytical conclusions point toward the strong advantages of the switched-capacitor (SC) approach with respect to both switch utilization and much higher energy densities of capacitors versus inductors. The analysis is substantiated with a review of recently developed and published integrated dc-dc converters of both the inductor-based and SC types. © 2012 IEEE

Analysis and design of wideband voltage controlled oscillators using self-oscillating active inductors.

Voltage controlled oscillators (VCOs) are essential components of RF circuits used in transmitters and receivers as sources of carrier waves with variable frequencies. This, together with a rapid development of microelectronic circuits, led to an extensive research on integrated implementations of the oscillator circuits. One of the known approaches to oscillator design employs resonators with active inductors electronic circuits simulating the behavior of passive inductors using only transistors and capacitors. Such resonators occupy only a fraction of the silicon area necessary for a passive inductor, and thus allow to use chip area more eectively. The downsides of the active inductor approach include: power consumption and noise introduced by transistors. This thesis presents a new approach to active inductor oscillator design using selfoscillating active inductor circuits. The instability necessary to start oscillations is provided by the use of a passive RC network rather than a power consuming external circuit employed in the standard oscillator approach. As a result, total power consumption of the oscillator is improved. Although, some of the active inductors with RC circuits has been reported in the literature, there has been no attempt to utilise this technique in wideband voltage controlled oscillator design. For this reason, the dissertation presents a thorough investigation of self-oscillating active inductor circuits, providing a new set of design rules and related trade-os. This includes: a complete small signal model of the oscillator, sensitivity analysis, large signal behavior of the circuit and phase noise model. The presented theory is conrmed by extensive simulations of wideband CMOS VCO circuit for various temperatures and process variations. The obtained results prove that active inductor oscillator performance is obtained without the use of standard active compensation circuits. Finally, the concept of self-oscillating active inductor has been employed to simple and fast OOK (On-Off Keying) transmitter showing energy eciency comparable to the state of the art implementations reported in the literature

Low power digitally controlled oscillator for IoT applications

This work is focused on the design of a Low Power CMOS DCO for IEEE 802.11ah in IoT applications. The design methodology is based on the Unified current-control model (UICM), which is a physics-based model and enables an accurate all-region model of the operation of the device. Additionally, a transformer-based resonator has been used to solve the low-quality factor issue of integrated inductors. Two digitally controlled oscillators (DCO) have been implemented to show the advantages of utilizing a transformedbased resonator and the methodology based on the UICM model. These designs aim for the operation in low voltage supply (VDD) since VDD scaling is a trend in systems-onchip (SoCs), in which the circuitry is mostly digital. Despite the degradation caused by VDD scaling, new RF and analog circuits must deliver similar performance of the older CMOS nodes. The first DCO design was a low power LC-tank DCO, implemented in 40nm bulk-CMOS. The first design presented a DCO operating at 45% of the nominal VDD without compromise the performance. By reducing the VDD below the nominal value, this DCO reduces power consumption, which is a crucial feature for IoT circuits. The main contribution of this first DCO is the reduction of VDD scaling impact on the phase-noise do the DCO. The LC-based DCO operates from 1.8 to 1.86 GHz. At the maximum frequency and 0.395V VDD, the power consumption is a mere 380 W with a phase-noise of -119.3 dBc/Hz at 1 MHz. The circuit occupies an area of 0.46mm2 in 40 nm CMOS, mostly due to the inductor. The second DCO design was a low-power transformer-based DCO design, implemented in 28nm bulk-CMOS. This second design aims for the VDD reduction to below 0.3 V. Operating in a frequency range similar to the LC-based DCO, the transformer-based DCO operated with 0.280V VDD with a power consumption of 97 W. Meanwhile, the phase-noise was -101.95 dBc/Hz at 1 MHz. Even in the worst-case scenario (i.e., slow-slow and 85oC), this second DCO was able to operate at 0.330V VDD, consuming 126 W, while it keeps a similar phase-noise performance of the typical case. The core circuit occupies an area of 0.364 mm2.Este trabalho objetiva o projeto de um DCO de baixa potência em CMOS para aplicações de IoT e aderentes ao padrão IEEE 802.11ah. A metodologia de projeto é baseada no modelo de controle de corrente unificado (UICM), que é um modelo com embasamento físico que permite uma operação precisa em todas as regiões de operação do dispositivo. Adicionalmente, é utilizado um ressonador baseado em transformador visando solucionar os problemas provenientes do baixo fator de qualidade de indutores integrados. Para destacar as melhorias obtidas com o projeto do ressonador baseado em transformador e com a metodologia baseada no modelo UICM, dois projetos de DCO são realizados. Esses projetos visam a operação com baixa tensão de alimentação (VDD), uma vez que o escalonamento do VDD é uma tendência em sistemas em chip (SoCs), em que o circuito é majoritariamente digital. Independente da degradação causada pelo escalonamento de VDD, circuitos analógicos e de RF atuais devem oferecer desempenho semelhante ao alcançado em tecnologias CMOS mais antigas. O primeiro projeto foi um DCO de baixa potência com tanque LC, implementado em tecnologia bulk-CMOS de 40nm. O primeiro projeto apresentou uma operação a 45% do VDD nominal sem comprometer o desempenho. Ao reduzir o VDD abaixo do valor nominal, este DCO reduz o consumo de energia, que é uma característica crucial para circuitos IoT. A principal contribuição deste DCO é a redução do impacto do escalonamento do VDD no ruído de fase. O DCO com tanque LC opera de 1,8 a 1,86 GHz. Na frequência máxima e com VDD de apenas 0,395V, o consumo de energia é 380 W e o ruído de fase é -119,3 dBc/Hz a 1 MHz. O circuito ocupa uma área de 0.46mm2 em processo CMOS de 40 nm. O segundo projeto foi um DCO de baixa potência baseado em transformador, implementado em tecnologia bulk- CMOS de 28nm. Este projeto visa a redução de VDD abaixo de 0,3 V. Operando em uma faixa de frequência semelhante ao primeiro DCO, o DCO baseado em transformador opera com VDD de 0,280V e com consumo de potência de 97 W. O ruído de fase foi de -101,95 dBc/Hz a 1 MHz. Mesmo no pior caso de processo, este DCO opera a um VDD de 0,330V, consumindo 126 W, com o ruído de fase semelhante ao caso típico. O circuito ocupa uma área de 0.364mm2

High Efficiency, Good phase linearity 0.18 µm CMOS Power Amplifier for MBAN-UWB Applications

This paper presents the design of 3.1-10.6 GHz class AB power amplifier (PA) suitable for medical body area network (MBAN) Ultra-Wide Band (UWB) applications in TSMC 0.18 µm technology. An optimization technique to simultaneously maximize power added efficiency(PAE) and minimize group delay variation is employed. Source and Load-pull contours are used to design inter and output stage matching circuits. The post-layout simulation results indicated that the designed PA has a maximum PAE of 32 % and an output 1-dB compression of 11 dBm at 4 GHz. In addition, a small group delay variation of ± 50 ps was realized over the whole required frequency band . Moreover, the proposed PA has small signal power gain (S21) of 12.5 dB with ripple less than 1.5 dB over the frequency range between 3.1 GHz to 10.6 GHz, while consuming 36 mW

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

BiCMOS Millimetre-wave low-noise amplifier

Abstract: Please refer to full text to view abstract.D.Phil. (Electrical and Electronic Engineering