A GaN-Based Synchronous Rectifier with Reduced Voltage Distortion for 6.78 MHz Wireless Power Applications

The call for a larger degree of engineering innovation grows as wireless power transfer increases in popularity. In this thesis, 6.78 MHz resonant wireless power transfer is explained. Challenges in WPT such as dynamic load variation and electromagnetic interference due to harmonic distortion are discussed, and a literature review is conducted to convey how the current state of the art is addressing these challenges.A GaN-based synchronous rectifier is proposed as a viable solution, and a model of the circuit is constructed. The precisely derived model is compared to a linearized model to illustrate the importance of exactness within the model derivation. The model is then used to quantify the design space of circuit parameters Lr and Cr with regard to harmonic distortion, input phase control, and efficiency. Practical design decisions concerning the 6.78 MHz system are explained. These include gate driver choice and mitigation of PCB parasitics. The model is verified with open loop experimentation using a linear power amplifier, FPGA, electronic load, and two function generators. Current zero-crossing sensing is then introduced in order to achieve self-regulation of both the switching frequency and input phase. The details of the FPGA code and sensing scheme used to obtain this closed loop functionality are described in detail. Finally, conclusions are drawn, and future work is identified

Efficient Visible Light Communication Transmitters Based on Switching-Mode dc-dc Converters

Visible light communication (VLC) based on solid-state lighting (SSL) is a promising option either to supplement or to substitute existing radio frequency (RF) wireless communication in indoor environments. VLC systems take advantage of the fast modulation of the visible light that light emitting diodes (LEDs) enable. The switching-mode dc-to-dc converter (SMCdc-dc) must be the cornerstone of the LED driver of VLC transmitters in order to incorporate the communication functionality into LED lighting, keeping high power efficiency. However, the new requirements related to the communication, especially the high bandwidth that the LED driver must achieve, converts the design of the SMCdc-dc into a very challenging task. In this work, three different methods for achieving such a high bandwidth with an SMCdc-dc are presented: increasing the order of the SMCdc-dc output filter, increasing the number of voltage inputs, and increasing the number of phases. These three strategies are combinable and the optimum design depends on the particular VLC application, which determines the requirements of the VLC transmitter. As an example, an experimental VLC transmitter based on a two-phase buck converter with a fourth-order output filter will demonstrate that a bandwidth of several hundred kilohertz (kHz) can be achieved with output power levels close to 10Wand power efficiencies between 85% and 90%. In conclusion, the design strategy presented allows us to incorporate VLC into SSL, achieving high bit rates without damaging the power efficiency of LED lightin

Design of a low-voltage low-power dc-dc HF converter

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 230-234).Many portable electronic applications could benefit from a power converter able to achieve high efficiency across wide input and output voltage ranges at a small size. However, it is difficult for many conventional power converter designs to provide wide operation range while maintaining high efficiency, especially if both up-and-down voltage conversion is to be achieved. Furthermore, the bulk energy storage required at contemporary switching frequencies of a few megahertz and below limits the degree of miniaturization that can be achieved and hampers fast transient response. Therefore, design methods that reduce energy storage requirements and expand efficient operation range are desirable. This thesis focuses on the development of a High Frequency (HF) dc-dc SEPIC converter exploiting resonant switching and gating with fixed frequency control techniques to achieve these goals. The proposed approach provides high efficiency over very wide input and output voltage ranges and power levels. It also provides up-and-down conversion, and requires little energy storage which allows for excellent transient response. The proposed design strategies are discussed in the context of a prototype converter operating over wide input voltage (3.6 - 7.2V), output voltage (3 - 9V) and power (0.3 - 3W) ranges. The 20MHz converter prototype, utilizing commercial vertical MOSFETs, takes advantage of a quasi-resonant SEPIC topology and resonant gating technique to provide good efficiency across the wide operating ranges required. The converter efficiency stays above 80% across the entire input voltage range at the nominal output voltage. The closed-loop performance is demonstrated via an implementation of a PWM on-off control scheme, illustrating the salient characteristics in terms of additional control circuitry power dissipation and transient response.by Jingying Hu.S.M

Design of low-voltage, high-bandwidth radio frequency power converters

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 158-166).The mass and volume required for power electronics circuitry is a dominant obstacle to the miniaturization and integration of many systems. Likewise, power electronics with greater bandwidth and efficiency are becoming vital in many applications. To realize smaller and highly responsive power electronics at low voltages, this thesis explores devices, circuits, and passives capable of operating efficiently at very high frequencies (VHF, 30-300 MHz). Operation at these frequencies enables reduction of the numerical values and physical size of the passive components that dominate power converters, and enables increased bandwidth and transient performance which is valuable in a multitude of low-voltage and low-power applications. This thesis explores the scaling of magnetic component size with frequency, and it is shown that substantial miniaturization is possible with increased frequencies even considering material and heat transfer limitations. Moreover, the impact of frequency scaling of power converters on magnetic components is investigated for different design criteria. Quantitative examples of magnetics scaling are provided that clearly demonstrate the benefits and opportunities in VHF magnetics design. It is shown to utilize the advantages of frequency scaling on passive component size that system losses and other limitations must be considered. One such area that is examined is semiconductor device requirements, where through a combination of device layout optimization for cascode structures and integrated gate drive designs on a 0.35-um CMOS process, converter performance (i.e., loss and bandwidth) can be significantly improved in the VHF regime. In this thesis a dc-dc converter topology is developed that is suitable for low-voltage power conversion and employs synchronous rectification to improve efficiency. The converter is also comprised of a high-bandwidth and high-switching-frequency inverter topology that can dynamically adjust the output power from one-quarter to full power, while maintaining good efficiency. Furthermore, with its inherent capability of gate-width switching, the inverter can further reduce gating loss by one-half resulting in substantial performance improvements at light load operation. A major contribution of this thesis is the development of a synchronous rectifier operating in the VHF regime. VHF power conversion is especially challenging at low voltages due to poor efficiency resulting from rectification loss. To overcome diode rectification loss, the benefits of synchronous rectification are discussed in the context of a 100MHz class-E resonant rectifier, which results in a 2.5 x overall converter efficiency improvement. The culmination of the developed design techniques in passives, semiconductor devices, and circuit topologies is an experimental prototype of a miniaturized 100MHz, 1W power converter utilizing synchronous rectification.by Jingying Hu.Ph.D

GaN-Based High Efficiency Transmitter for Multiple-Receiver Wireless Power Transfer

Wireless power transfer (WPT) has attracted great attention from industry and academia due to high charging flexibility. However, the efficiency of WPT is lower and the cost is higher than the wired power transfer approaches. Efforts including converter optimization, power delivery architecture improvement, and coils have been made to increase system efficiency.In this thesis, new power delivery architectures in the WPT of consumer electronics have been proposed to improve the overall system efficiency and increase the power density.First, a two-stage transmitter architecture is designed for a 100 W WPT system. After comparing with other topologies, the front-end ac-dc power factor correction (PFC) rectifier employs a totem-pole rectifier. A full bridge 6.78 MHz resonant inverter is designed for the subsequent stage. An impedance matching network provides constant transmitter coil current. The experimental results verify the high efficiency, high PF, and low total harmonic distortion (THD).Then, a single-stage transmitter is derived based on the verified two-stage structure. By integration of the PFC rectifier and full bridge inverter, two GaN FETs are saved and high efficiency is maintained. The integrated DCM operated PFC rectifier provides high PF and low THD. By adopting a control scheme, the transmitter coil current and power are regulated. A simple auxiliary circuit is employed to improve the light load efficiency. The experimental results verify the achievement of high efficiency.A closed-loop control scheme is implemented in the single-stage transmitter to supply multiple receivers simultaneously. With a controlled constant transmitter current, the system provides a smooth transition during dynamically load change. ZVS detection circuit is proposed to protect the transmitter from continuous hard switching operation. The control scheme is verified in the experiments.The multiple-reciever WPT system with the single-stage transmitter is investigated. The system operating range is discussed. The method of tracking optimum system efficiency is studied. The system control scheme and control procedure, targeting at providing a wide system operating range, robust operation and capability of tracking the optimized system efficiency, are proposed. Experiment results demonstrate the WPT system operation

Low Voltage Regulator Modules and Single Stage Front-end Converters

Evolution in microprocessor technology poses new challenges for supplying power to these devices. To meet demands for faster and more efficient data processing, modem microprocessors are being designed with lower voltage implementations. More devices will be packed on a single processor chip and the processors will operate at higher frequencies, exceeding 1GHz. New high-performance microprocessors may require from 40 to 80 watts of power for the CPU alone. Load current must be supplied with up to 30A/µs slew rate while keeping the output voltage within tight regulation and response time tolerances. Therefore, special power supplies and Voltage Regulator Modules (VRMs) are needed to provide lower voltage with higher current and fast response. In the part one (chapter 2,3,4) of this dissertation, several low-voltage high-current VRM technologies are proposed for future generation microprocessors and ICs. The developed VRMs with these new technologies have advantages over conventional ones in terms of efficiency, transient response and cost. In most cases, the VRMs draw currents from DC bus for which front-end converters are used as a DC source. As the use of AC/DC frond-end converters continues to increase, more distorted mains current is drawn from the line, resulting in lower power factor and high total harmonic distortion. As a branch of active Power factor correction (PFC) techniques, the single-stage technique receives particular attention because of its low cost implementation. Moreover, with continuously demands for even higher power density, switching mode power supply operating at high-frequency is required because at high switching frequency, the size and weight of circuit components can be remarkably reduced. To boost the switching frequency, the soft-switching technique was introduced to alleviate the switching losses. The part two (chapter 5,6) of the dissertation presents several topologies for this front-end application. The design considerations, simulation results and experimental verification are discussed

Highly Integrated Dc-dc Converters

A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-µm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier\u27s application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35µm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration