42,359 research outputs found

    Timing Measurement Platform for Arbitrary Black-Box Circuits Based on Transition Probability

    No full text

    Bridging the Testing Speed Gap: Design for Delay Testability

    Get PDF
    The economic testing of high-speed digital ICs is becoming increasingly problematic. Even advanced, expensive testers are not always capable of testing these ICs because of their high-speed limitations. This paper focuses on a design for delay testability technique such that high-speed ICs can be tested using inexpensive, low-speed ATE. Also extensions for possible full BIST of delay faults are addresse

    Digital test signal generation: An accurate SNR calibration approach for the DSN

    Get PDF
    A new method of generating analog test signals with accurate signal to noise ratios (SNRs) is described. High accuracy will be obtained by simultaneous generation of digital noise and signal spectra at a given baseband or bandpass limited bandwidth. The digital synthesis will provide a test signal embedded in noise with the statistical properties of a stationary random process. Accuracy will only be dependent on test integration time with a limit imposed by the system quantization noise (expected to be 0.02 dB). Setability will be approximately 0.1 dB. The first digital SNR generator to provide baseband test signals is being built and will be available in early 1991
    corecore