10,800 research outputs found

    TEACHING IN THE CLOUD MICROELECTRONICS UBIQUITOUS LAB (MULAB)

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    CAD laboratory students activity is mandatory for microelectronics teaching. This, applied in the deep-submicron era, creates new challenges to couple software management simplicity to user friendliness inside lab sessions, which requires the use of complex tools and concepts. In this paper, a new approach to microelectronics CAD deployment is presented, based on virtualization capabilities of new servers hardware and software technology. A test case, realized at Politecnico di Torino, degree of Electronic Engineering, is presented, with real world results on resource consumption and user satisfactio

    Enhancing Power Efficient Design Techniques in Deep Submicron Era

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    Excessive power dissipation has been one of the major bottlenecks for design and manufacture in the past couple of decades. Power efficient design has become more and more challenging when technology scales down to the deep submicron era that features the dominance of leakage, the manufacture variation, the on-chip temperature variation and higher reliability requirements, among others. Most of the computer aided design (CAD) tools and algorithms currently used in industry were developed in the pre deep submicron era and did not consider the new features explicitly and adequately. Recent research advances in deep submicron design, such as the mechanisms of leakage, the source and characterization of manufacture variation, the cause and models of on-chip temperature variation, provide us the opportunity to incorporate these important issues in power efficient design. We explore this opportunity in this dissertation by demonstrating that significant power reduction can be achieved with only minor modification to the existing CAD tools and algorithms. First, we consider peak current, which has become critical for circuit's reliability in deep submicron design. Traditional low power design techniques focus on the reduction of average power. We propose to reduce peak current while keeping the overhead on average power as small as possible. Second, dual Vt technique and gate sizing have been used simultaneously for leakage savings. However, this approach becomes less effective in deep submicron design. We propose to use the newly developed process-induced mechanical stress to enhance its performance. Finally, in deep submicron design, the impact of on-chip temperature variation on leakage and performance becomes more and more significant. We propose a temperature-aware dual Vt approach to alleviate hot spots and achieve further leakage reduction. We also consider this leakage-temperature dependency in the dynamic voltage scaling approach and discover that a commonly accepted result is incorrect for the current technology. We conduct extensive experiments with popular design benchmarks, using the latest industry CAD tools and design libraries. The results show that our proposed enhancements are promising in power saving and are practical to solve the low power design challenges in deep submicron era

    Nanoelectromechanical systems

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    Nanoelectromechanical systems (NEMS) are drawing interest from both technical and scientific communities. These are electromechanical systems, much like microelectromechanical systems, mostly operated in their resonant modes with dimensions in the deep submicron. In this size regime, they come with extremely high fundamental resonance frequencies, diminished active masses,and tolerable force constants; the quality (Q) factors of resonance are in the range Q~10^3–10^5—significantly higher than those of electrical resonant circuits. These attributes collectively make NEMS suitable for a multitude of technological applications such as ultrafast sensors, actuators, and signal processing components. Experimentally, NEMS are expected to open up investigations of phonon mediated mechanical processes and of the quantum behavior of mesoscopic mechanical systems. However, there still exist fundamental and technological challenges to NEMS optimization. In this review we shall provide a balanced introduction to NEMS by discussing the prospects and challenges in this rapidly developing field and outline an exciting emerging application, nanoelectromechanical mass detection

    Challenges in mixed-signal IC design of CNN chips in submicron CMOS

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    Summary form only given. The contrast observed between the performance of artificial vision machines and "natural" vision system is due to the inherent parallelism of the former. In particular, the retina combines image sensing and parallel processing to reduce the amount of data transmitted for subsequent processing by the following stages of the human vision system. Industrial applications demand CMOS vision chips capable of flexible operation, with programmable features and standard interfacing to conventional equipment. The CNN Universal Machine (CNN-UM) is a powerful methodological framework for the systematic development of these chips. Basic system-level targets in the design of these chips are to increase the cell density and operation speed. As the technology scales down to submicron all the lateral dimensions decrease by the scaling factor /spl lambda/, and the vertical dimensions scale as /spl lambda//sup -a/, where a is typically around 1/2. Ideally, cell density /spl prop//spl lambda//sup 2/ and time constant /spl prop//spl lambda//sup -2/. The article explains why this is not strictly true, and addresses the challenges involved in the design of CNN chips in submicron technologies.Comisión Interministerial de Ciencia y Tecnología TIC96-1392-C02-0

    Radiation damages in CMOS image sensors: testing and hardening challenges brought by deep sub-micrometer CIS processes

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    This paper presents a summary of the main results we observed after several years of study on irradiated custom imagers manufactured using 0,18 µm CMOS processes dedicated to imaging. These results are compared to irradiated commercial sensor test results provided by the Jet Propulsion Laboratory to enlighten the differences between standard and pinned photodiode behaviors. Several types of energetic particles have been used (gamma rays, X-rays, protons and neutrons) to irradiate the studied devices. Both total ionizing dose (TID) and displacement damage effects are reported. The most sensitive parameter is still the dark current but some quantum eficiency and MOSFET characteristics changes were also observed at higher dose than those of interest for space applications. In all these degradations, the trench isolations play an important role. The consequences on radiation testing for space applications and radiation-hardening-by-design techniques are also discussed

    Adaptive differential amplitude pulse-position modulation technique (DAPPM) using fuzzy logic for optical wireless communication channels

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    In the past few years, people have become increasingly demanding for high transmission rate, using high-speed data transfer rate, the number of user increased every year, therefore the high-speed optical wireless communication link have become more popular. Optical wireless communication has the potential for extremely high data rates of up to tens of Gigabits per second (Gb/s). An optical wireless channel is usually a non-directed link which can be categorized as either line-of-sight (LOS) or diffuses. Modulation techniques have attracted increasing attention in optical wireless communication, therefore in this project; a hybrid modulation technique named Differential Amplitude Pulse-Position Modulation (DAPPM) is proposed to improve the channel immunity by utilizing optimized modulation to channel. The average symbol length, unit transmission rate, channel capacity, peak-to-average power ratio (PAPR), transmission capacity, bandwidth requirement and power requirement of the DAPPM were determined and compared with other modulation schemes such as On-Off Key (OOK), Pulse-Amplitude Modulation (PAM), Pulse-Position Modulation (PPM), Differential Pulse-Position Modulation (DPPM), and Multilevel Digital Pulse Interval Modulation (MDPIM). Simulation result shows that DAPPM gives better bandwidth and power efficiency depending on the number of amplitude level (A) and the maximum length (L) of a symbol. In addition, the fuzzy logic module is developed to assist the adaptation process of differential amplitude pulse-position modulation. Mamdani fuzzy logic method is used in which the decisions made by the system will be approaching to what would be decided by the user in the real world

    Total dose evaluation of deep submicron CMOS imaging technology through elementary device and pixel array behavior analysis

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    Ionizing radiation effects on CMOS image sensors (CIS) manufactured using a 0.18 µm imaging technology are presented through the behavior analysis of elementary structures, such as field oxide FET, gated diodes, photodiodes and MOSFETs. Oxide characterizations appear necessary to understand ionizing dose effects on devices and then on image sensors. The main degradations observed are photodiode dark current increases (caused by a generation current enhancement), minimum size NMOSFET off-state current rises and minimum size PMOSFET radiation induced narrow channel effects. All these effects are attributed to the shallow trench isolation degradation which appears much more sensitive to ionizing radiation than inter layer dielectrics. Unusual post annealing effects are reported in these thick oxides. Finally, the consequences on sensor design are discussed thanks to an irradiated pixel array and a comparison with previous work is discussed

    Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs

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    Intrinsic parameter fluctuations introduced by discreteness of charge and matter will play an increasingly important role when semiconductor devices are scaled to decananometer and nanometer dimensions in next-generation integrated circuits and systems. In this paper, we review the analytical and the numerical simulation techniques used to study and predict such intrinsic parameters fluctuations. We consider random discrete dopants, trapped charges, atomic-scale interface roughness, and line edge roughness as sources of intrinsic parameter fluctuations. The presented theoretical approach based on Green's functions is restricted to the case of random discrete charges. The numerical simulation approaches based on the drift diffusion approximation with density gradient quantum corrections covers all of the listed sources of fluctuations. The results show that the intrinsic fluctuations in conventional MOSFETs, and later in double gate architectures, will reach levels that will affect the yield and the functionality of the next generation analog and digital circuits unless appropriate changes to the design are made. The future challenges that have to be addressed in order to improve the accuracy and the predictive power of the intrinsic fluctuation simulations are also discussed

    A Radiation hard bandgap reference circuit in a standard 0.13um CMOS Technology

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    With ongoing CMOS evolution, the gate-oxide thickness steadily decreases, resulting in an increased radiation tolerance of MOS transistors. Combined with special layout techniques, this yields circuits with a high inherent robustness against X-rays and other ionizing radiation. In bandgap voltage references, the dominant radiation-susceptibility is then no longer associated with the MOS transistors, but is dominated by the diodes. This paper gives an analysis of radiation effects in both MOSdevices and diodes and presents a solution to realize a radiation-hard voltage reference circuit in a standard CMOS technology. A demonstrator circuit was implemented in a standard 0.13 m CMOS technology. Measurements show correct operation with supply voltages in the range from 1.4 V down to 0.85 V, a reference voltage of 405 mV 7.5 mV ( = 6mVchip-to-chip statistical spread), and a reference voltage shift of only 1.5 mV (around 0.8%) under irradiation up to 44 Mrad (Si)
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