1,931 research outputs found
Unipolar resistive switching in metal oxide/organic semiconductor non-volatile memories as a critical phenomenon
Diodes incorporating a bilayer of an organic semiconductor and a wide bandgap metal oxide can show unipolar, non-volatile memory behavior after electroforming. The prolonged bias voltage stress induces defects in the metal oxide with an areal density exceeding 10(17) m(-2). We explain the electrical bistability by the coexistence of two thermodynamically stable phases at the interface between an organic semiconductor and metal oxide. One phase contains mainly ionized defects and has a low work function, while the other phase has mainly neutral defects and a high work function. In the diodes, domains of the phase with a low work function constitute current filaments. The phase composition and critical temperature are derived from a 2D Ising model as a function of chemical potential. The model predicts filamentary conduction exhibiting a negative differential resistance and nonvolatile memory behavior. The model is expected to be generally applicable to any bilayer system that shows unipolar resistive switching. (C) 2015 Author(s).Dutch Polymer Institute (DPI), BISTABLE [704]; Fundacao para Ciencia e Tecnologia (FCT) through the research Instituto de Telecommunicacoes (IT-Lx); project Memristor based Adaptive Neuronal Networks (MemBrAiNN) [PTDC/CTM-NAN/122868/2010]; European Community Seventh Framework Programme FP7', ONE-P [212311]; Dutch Ministry of Education, Culture and Science (Gravity Program) [024.001.035]info:eu-repo/semantics/publishedVersio
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ΈνλΈμ κ°κ²©μ λ°λΌ λ€λ₯΄κ² νμ±λμ΄ λ€λ₯Έ λͺ¨μμ λ§μ΄ν¬λ‘ λ°κ΄λ€μ΄μ€λκ° μ±μ₯λλ κ²μ μ΄μ©νμλ€. κ°κΈ° λ€λ₯Έ λ°κ΄λ€μ΄μ€λμ κ°μ μ μμ κ°ν΄μ€¬μ λ μ±μ₯λ₯ μ μ°¨μ΄λ‘ μΈν λ€μ€ μμ μ°λ¬Ό μ‘°μ±μ λ³ν λ° μμ¬ λ΄λΆμ κ²°ν¨μΌλ‘ μΈν΄ κ°κΈ° λ€λ₯Έ νμ₯μ μμ΄ λ°κ΄λλ νΉμ±μ νμΈνμκ³ , μ μ°ν ννμμλ μμ μ μΌλ‘ λ°κ΄νΉμ±μ΄ μ μ§λλ κ²μ νμΈν μ μμλ€.The hybrid dimensional nanostructrures composed of high-quality inorganic nanostructures grown directly on two-dimensional (2D) materials such as graphene offers a novel material system for flexible electronics and optoelectronics. Indeed, the hybrid dimensional nanostructures have been fabricated to flexible electronics/optoelectronics and attracted many attentions with their excellent performances. Despite of the demonstration of flexible devices using the hybrid dimensional nanostructures, there remains a lot of devices that need to be further investigated in order to realize future electronics/optoelectronics such as wearable devices. This thesis presents the hybrid material system composed of oxide/nitrid heterostructures grown on graphene films and their applications on flexible non-volatile memory and flexible multi-color LEDs.Abstract
Chapter 1. General Introduction 1
1.1. Motivation: Potentials of hybrid dimensional nanomaterials for flexible electronic/optoelectronic device applications 1
1.2. Thesis objective and approach 3
1.3. Thesis outline 4
Chapter 2. Literature survey 6
2.1. Oxide-based flexible electronics 6
2.1.1. Current status of oxide-based electronics 8
2.1.2. Next generation oxide-based electronics: ReRAM 12
2.1.3. Flexible ReRAM 17
2.1.3.1. ReRAM on plastic substrates 17
2.1.3.2. Transfer of ReRAM layers on flexible substrates 20
2.2. Nitride-based flexible optoelectronics 23
2.2.1. Current status of nitride-based optoelectronics 23
2.2.2. Next generation nitride-based optoelectronics: flexible & high-resolution LED 29
2.3. Hybrid dimensional material systems for flexible electronics and Optoelectronics 34
2.3.1. Growth of oxide & nitride nano-/micro-structures on graphene layers35
2.3.2. Functional devices using hybrid dimensional material Systems 45
2.3.2.1. Electronics 47
2.3.2.2. Optoelectronics 50
Chapter 3. Experimental Techniques 53
3.1. Growth techniques 53
3.1.1. Metalorganic vapor-phase epitaxy system 53
3.1.1.1. Gas delivery system 53
3.1.1.2. Reactor and temperature controller 55
3.1.1.3. Exhaust disposal system and low pressure pumping System 56
3.2. Structural characterization 57
3.2.1. Morphology inspection 57
3.2.2. Crystallographic and microstructural investigations 57
3.2.2.1. Transmission electron microscopy 57
3.3. Optical characterization 58
3.3.1. Photoluminescence & electroluminescence spectroscopy 58
3.4. Electrical characterization 59
3.4.1. Current-Voltage measurement 59
Chapter 4. Flexible ReRAM based on hybrid dimensional material systems 60
4.1. Introduction 60
4 .2. Growth of oxide/nitride hybrid structures on graphene layers 61
4.2.1. ZnO nanowall growth CVD-graphene films 62
4.2.2. Growth of GaN microdisk arrays 62
4.2.3. Growth of resistive switching layers 65
4.4. Fabrication of flexible ReRAM 65
4.5. Resistive switching characteristics 69
4.6. Discussion for the mechanism of resistive switchings using oxide/nitride hybrid structures 78
4.6.1. Fabrication of ReRAM/LED hybrid device 80
4.6.2. Real-time imaging of resistive switching dynamics 85
4.7. Summary 99
Chapter 5. Monolithic integration of morphology controlled GaN microstructures on graphene films for flexible & multi-color LEDs 101
5.1. Introduction 101
5.2. Morphology control of GaN microstructures on graphene films 103
5.2.1. Growth parameter: spacing & time 103
5.2.2. Growth behavior analysis 109
5.3. Fabrication of LEDs on graphene films 115
5.4. EL and electrical characteristics 118
5.5. High temperature operations of flexible LEDs 125
5.6. Summary 134
Chapter 6. Conclusion and Outlook 136
6.1. Conclusion 136
6.2. Future works and outlook 141
References 143
Abstract (Korean) 151Docto
Delay dynamics of neuromorphic optoelectronic nanoscale resonators: Perspectives and applications
With the recent exponential growth of applications using artificial intelligence (AI), the development of efficient and ultrafast brain-like (neuromorphic) systems is crucial for future information and communication technologies. While the implementation of AI systems using computer algorithms of neural networks is emerging rapidly, scientists are just taking the very first steps in the development of the hardware elements of an artificial brain, specifically neuromorphic microchips. In this review article, we present the current state of the art of neuromorphic photonic circuits based on solid-state optoelectronic oscillators formed by nanoscale double barrier quantum well resonant tunneling diodes. We address, both experimentally and theoretically, the key dynamic properties of recently developed artificial solid-state neuron microchips with delayed perturbations and describe their role in the study of neural activity and regenerative memory. This review covers our recent research work on excitable and delay dynamic characteristics of both single and autaptic (delayed) artificial neurons including all-or-none response, spike-based data encoding, storage, signal regeneration and signal healing. Furthermore, the neural responses of these neuromorphic microchips display all the signatures of extended spatio-temporal localized structures (LSs) of light, which are reviewed here in detail. By taking advantage of the dissipative nature of LSs, we demonstrate potential applications in optical data reconfiguration and clock and timing at high-speeds and with short transients. The results reviewed in this article are a key enabler for the development of high-performance optoelectronic devices in future high-speed brain-inspired optical memories and neuromorphic computing. (C) 2017 Author(s).Fundacao para a Ciencia e a Tecnologia (FCT) [UID/Multi/00631/2013]European Structural and Investment Funds (FEEI) through the Competitiveness and Internationalization Operational Program - COMPETE 2020National Funds through FCT [ALG-01-0145-FEDER-016432/POCI-01-0145-FEDER-016432]European Commission under the project iBROW [645369]project COMBINA [TEC2015-65212-C3-3-PAEI/FEDER UE]Ramon y Cajal fellowshipinfo:eu-repo/semantics/publishedVersio
Wide and ultra-wide bandgap oxides : where paradigm-shift photovoltaics meets transparent power electronics
Oxides represent the largest family of wide bandgap (WBG) semiconductors and also offer a huge potential range of complementary magnetic and electronic properties, such as ferromagnetism, ferroelectricity, antiferroelectricity and high-temperature superconductivity. Here, we review our integration of WBG and ultra WBG semiconductor oxides into different solar cells architectures where they have the role of transparent conductive electrodes and/or barriers bringing unique functionalities into the structure such above bandgap voltages or switchable interfaces. We also give an overview of the state-of-the-art and perspectives for the emerging semiconductor Ξ²- GaO, which is widely forecast to herald the next generation of power electronic converters because of the combination of an UWBG with the capacity to conduct electricity. This opens unprecedented possibilities for the monolithic integration in solar cells of both self-powered logic and power electronics functionalities. Therefore, WBG and UWBG oxides have enormous promise to become key enabling technologies for the zero emissions smart integration of the internet of things
Through Silicon Via Field-Effect Transistor with Hafnia-based Ferroelectrics and the Doping of Silicon by Gallium Implantation Utilizing a Focused Ion Beam System
3-dimensional integration has become a standard to further increase the transistor density and to enhance the integrated functionality in microchips. Integrated circuits are stacked on top of each other and copper-filled through-silicon VIAs (TSVs) are the industry-accepted choice for their vertical electrical connection. The aim of this work is to functionalize the TSVs by implementing vertical field-effect transistors inside the via holes. The front and back sides of 200 ... 300 Β΅m thin silicon wafers were doped to create the source/drain regions of n- and p-FETs. The TSVFETs showed very stable saturation currents and on/off current ratios of about 10^6 (n-TSVFET) and 10^3 (p-TSVFET) for a gate voltage magnitude of 4V. The use of hafnium zirconium oxide on a thin SiO_2 interface layer as gate dielectric material in a p-TSVFET, enabled the implementation of a charge trapping memory inside the TSVs, showing a memory window of about 1V. This allows the non-volatile storage of the transistor on/off state. In addition, the demonstration of the use of gallium as the source/drain dopant in planar p-FET test structures (ion implanted from a focused ion beam tool) paves the way for maskless doping and for a process flow with a low thermal budget. It was shown, that ion implanted gallium can be activated and annealed at relatively low temperatures of 500 Β°C ... 700 Β°C.:Abstract / Kurzzusammenfassung
Danksagung
Index I
List of Figures III
List of Tables X
List of Symbols XI
List of Abbreviations XV
1 Introduction 1
2 Fundamentals 5
2.1 Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) 5
2.1.1 Historical Development - Technological Advancements 7
2.1.2 Field-Effect Transistors in Semiconductor Memories 10
2.2 3D Integration and the Use of TSVs (Through Silicon VIAs) 16
2.3 Doping of Silicon 19
2.3.1 Doping by Thermal Diffusion 20
2.3.2 Doping by Ion Implantation 22
3 Electrical Characterization 24
3.1 Resistivity Measurements 24
3.1.1 Resistance Determination by Four-Point Probes Measurement 24
3.1.2 Contact Resistivity 27
3.1.3 Doping Concentration 32
3.2 C-V Measurements 35
3.2.1 Fundamentals of MIS C-V Measurements 35
3.2.2 Interpretation of C-V Measurements 37
3.3 Transistor Measurements 41
3.3.1 Output Characteristics (I_D-V_D) 41
3.3.2 Transfer Characteristics (I_D-V_G) 42
4 TSV Transistor 45
4.1 Idea and Motivation 45
4.2 Design and Layout of the TSV Transistor 47
4.2.1 Design of the TSV Transistor Structures 47
4.2.2 Test Structures for Planar FETs 48
5 Variations in the Integration Scheme of the TSV Transistor 51
5.1 Doping by Diffusion from Thin Films 51
5.1.1 Determination of Doping Profiles 52
5.1.2 n- and p- TSVFETs Doped Manufactures by the Use of the Diffusion Technique 59
5.2 Ferroelectric Hafnium-Zirconium-Oxide (HZO) in the Gate Stack 81
5.2.1 Planar ferroelectric p-MOSFETs Doped by Thermal Diffusion 82
5.2.2 p-TSVFETs with Hafnium-Zirconium-Oxide Metal Gate 90
5.3 Doping by Ion Implantation of Gallium with a Focused Ion Beam (FIB) Tool 96
5.3.1 Ga doped Si Diodes 97
5.3.2 Planar p-MOSFETs Doped by Ga Implantation 108
5.3.3 Proposal for a parallel integration of Cu TSVs and p-TSVFETs 117
6 Summary and Outlook 120
Bibliography XVIII
A Appendix XXXVI
A.1 Resistivity and Dopant Density XXXVI
A.2 Mask set for the TSVFET XXXVII
A.3 Mask Design of the Planar Test Structures XXXVIII
Curriculum Vitae XXXIX
List of Scientific Publications XL
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