Full Duplex CMOS Transceiver with On-Chip Self-Interference Cancelation

abstract: The demand for the higher data rate in the wireless telecommunication is increasing rapidly. Providing higher data rate in cellular telecommunication systems is limited because of the limited physical resources such as telecommunication frequency channels. Besides, interference with the other users and self-interference signal in the receiver are the other challenges in increasing the bandwidth of the wireless telecommunication system. Full duplex wireless communication transmits and receives at the same time and the same frequency which was assumed impossible in the conventional wireless communication systems. Full duplex wireless communication, compared to the conventional wireless communication, doubles the channel efficiency and bandwidth. In addition, full duplex wireless communication system simplifies the reusing of the radio resources in small cells to eliminate the backhaul problem and simplifies the management of the spectrum. Finally, the full duplex telecommunication system reduces the costs of future wireless communication systems. The main challenge in the full duplex wireless is the self-interference signal at the receiver which is very large compared to the receiver noise floor and it degrades the receiver performance significantly. In this dissertation, different techniques for the antenna interface and self-interference cancellation are proposed for the wireless full duplex transceiver. These techniques are designed and implemented on CMOS technology. The measurement results show that the full duplex wireless is possible for the short range and cellular wireless communication systems.Dissertation/ThesisDoctoral Dissertation Engineering 201

Analysis of asymmetry of traffic in full-duplex wireless local area network

Mestrado de dupla diplomação com a UTFPR - Universidade Tecnológica Federal do ParanáThe standard commodity wireless hardware is half-duplex because there are challenges in full-duplex wireless that need attention and improvement. The self-interference in radios is one of the big challenges, but, even though there is no standard yet, there are several proposals that cancel enough self-interference that it is possible for communication to be successfully made. The standard half-duplex rules of the media access control (MAC) protocol contained on wireless cards do not accept simultaneous transmissions, because simultaneous transmissions are likely to collide with each other. Therefore, full-duplex wireless networks need a new MAC protocol to be able to handle the different full-duplex transmissions, namely, symmetric and asymmetric. Symmetric full-duplex transmissions ocurr between just two stations, which can be managed trivially by a suitable MAC protocol. On the other hand, asymmetric transmissions occur in communications involving three stations, and those transmissions are likely to produce collisions if one station receives simultaneously signals from the two others. From the different difficulties of each transmission type, emerges the doubt about how many opportunities are there for a full-duplex wireless network to make each type of transmission. With the focus on this question, this research proposes a method to collect traffic data from a real half-duplex wireless local area network (WLAN) to measure the amount of full-duplex symmetric and asymmetric transmission opportunities. The proposed method relies on: the brcmfmac driver, to collect the traffic data in kernel space; the Ftrace tracing utility framework, to send the data from kernel to user space; a Raspberry Pi 3 B+, in which is installed the modified driver and tracing utility; and an estimate of the travel time of frames between the kernel and firmware. The results of this research include a method to collect traffic data with the goal of measuring the amount of full-duplex transmissions opportunities and their types in a real half-duplex WLAN. It is also presented the analysis of a small amount of data collected during four days as an example of the proposed method, which shows that 4.096% of the frames presented the proper conditions to symmetric transmissions, while only 0.025% in the case of asymmetric transmissions.Os dispositivos sem fio padrão são half-duplex, pois o full-duplex sem fio apresenta desafios que precisam receber atenção e melhorias. A auto-interferência presente é um dos desafios, mas, ainda que não haja padrão, existem algumas propostas que cancelam a auto-interferência a ponto de comunicações serem realizadas com sucesso. As regras padrão do protocolo de controle de acesso ao meio (MAC) half-duplex contido nas placas sem fio não permitem transmissões simultâneas, já que são propensas a causar colisões. Portanto, redes full-duplex sem fio precisam de um novo protocolo MAC para que os diferentes tipos de transmissão full-duplex (simétrico e assimétrico) sejam utilizados. As transmissões simétricas ocorrem em comunicações entre apenas duas estações, o que pode ser gerido de forma trivial por um protocolo MAC apropriado. Por outro lado, as transmissões assimétricas envolvem comunicações entre três estações, e estas transmissões são propensas a gerar colisões no caso de uma das estações receber sinal das outras duas, simultaneamente. Devido às diferentes dificuldades de cada tipo de transmissão, surge a dúvida sobre quantas oportunidades existem para comunicação full-duplex de cada tipo de transmissão. Com foco nessa questão, esta pesquisa propõe um método para coleta de dados de tráfego de uma rede de área local sem fio (WLAN) half-duplex com o objetivo de calcular a quantidade de oportunidades de transmissões full-duplex simétricas e assimétricas. O método proposto conta com: o driver brcmfmac, para coleta de dados de tráfego em ambiente de kernel; o Ftrace, ferramenta utilitária de rastreamento, usado para enviar os dados do kernel para o ambiente do usuário; um Raspberry Pi 3 B+, no qual é instalado o driver modificado e o utilitário de rastreamento; e, um cálculo para estimar o tempo de viagem de pacotes entre o kernel e o firmware. Os resultados desta pesquisa incluem um método de coleta de dados de tráfego com o objetivo de quantificar as oportunidades de transmissões full-duplex e seus tipos em uma WLAN real. Também é apresentado uma coleta feita por quatro dias como um exemplo do mesmo. A análise mostra que 4.096% dos pacotes apresentam condições adequadas para transmissões simétricas, e apenas 0.025% para transmissões assimétricas

Performance evaluation of currently available VLSI implementations satisfying U-interface requirements for an ISDN in South Africa.

A project report submitted to the Faculty of Engineering, University of the Witwatersrand, Johannesburg, in partial fulfilment of the requirements for the degree of Master of Science in Engineering.This project report examines the performance of three VLSI U-interface implementations satisfying the requirements of Basic Access on an ISDN. The systems evaluated are the Intel 89120,Siemens PEB2090 and STC DSP144, operating on 2BIQ, MMS4J and SU32 line codes respectively. Before evaluating the three abovementioned systems, a review of the underlying principles of U-interface technology is presented. Included in the review are aspects of transmission line theory, line coding, echo-cancellation, decision feedback equalisation, and pulse density modulation. The functional specifications of the three systems are then presented followed by a practical evaluation of each system. As an aid to testing the transmission systems, an evaluation board has been designed and built. The latter provides the necessary functionality to correctly activate each system, as well as the appropriate interfacing requirements for the error-rate tester. The U-interface transmission systems are evaluated on a number of test-loops, comprising sections of cable varying in length and gauge. Additionally, impairments are injected into data-carrying cables, in order to test the performance of each system in the presence of noise. The results of each test are recorded and analysed. Finally, a recommendation is made in favour of the 2BIQ U-interface. It is shown to offer superior transmission performance, at the expense of a slightly higher transmit-power level.Andrew Chakane 201

Design Techniques for High Pin Efficiency Wireline Transceivers

While the majority of wireline research investigates bandwidth improvement and how to overcome the high channel loss, pin efficiency is also critical in high-performance wireline applications. This dissertation proposes two different implementations for high pin efficiency wireline transceivers. The first prototype achieves twice pin efficiency than unidirectional signaling, which is 32Gb/s simultaneous bidirectional transceiver supporting transmission and reception on the same channel at the same time. It includes an efficient low-swing voltage-mode driver with an R-gm hybrid for signal separation, combining the continuous-time-linear-equalizer (CTLE) and echo cancellation (EC) in a single stage, and employing a low-complexity 5/4X CDA system. Support of a wide range of channels is possible with foreground adaptation of the EC finite impulse response (FIR) filter taps with a sign-sign least-mean-square (SSLMS) algorithm. Fabricated in TSMC 28-nm CMOS, the 32Gb/s SBD transceiver occupies $0.09 mm^{2}$ area and achieves 16Gb/s uni-directional and 32Gb/s simultaneous bi-directional signals. 32Gb/s SBD operation consumes 1.83mW/Gb/s with 10.8dB channel loss at Nyquist rate. The second prototype presents an optical transmitter with a quantum-dot (QD) microring laser. This can support wavelength-division multiplexing allowing for high pin efficiency application by packing multiple high-bandwidth signals onto one optical channel. The development QD microring laser model accurately captures the intrinsic photonic high-speed dynamics and allows for the future co-design of the circuits and photonic device. To achieve higher bandwidth than intrinsic one, utilizing both techniques of optical injection locking (OIL) and 2-tap asymmetric Feed-forward equalizer (FFE) can perform 22Gb/s operation with 3.2mW/Gb/s. The first hybrid-integration directly-modulated OIL QD microring laser system is demonstrated

Measuring the Phase Variation of a DOCSIS 3.1 Full Duplex Channel

Including a Full Duplex option into DOCSIS introduces several problems. One of the more troublesome issues is the presence of a strong self interference signal that leaks from the transmit side to the receive side of a cable node. This self interference is caused by echoes in the channel that translate the forward travelling transmit signals into a reverse travelling signal, as well as, by leakage from the hybrid coupler used to couple the upstream and downstream signals. To suppress this self interference an echo canceller is implemented to remove the unwanted interference from the received signal. Unfortunately with the high rates of data transmission used in modern day CATV networks the echo canceller needs tremendous precision. A major concern in the implementation of Full Duplex into DOCSIS is if the channels used are even very slightly time varying. The echos in such channels change with time and can be difficult for the echo canceller to track. Changes in the response of the channel cause the echo profile of the network to shift and the echo canceler to re-adapt to the new channel response. The issue with this changing response is that it is possible for the channel to change faster than the echo canceller can adapt, resulting in the interference becoming unacceptably high. Since the channel is a physical network of coaxial cables often exposed to the environment, its propagation properties can be affected by wind swaying pole mounted cables, or by rapid heating from the sun, or sudden shifts in the load of the network. With information on how the physical properties of the cable changes, the engineers designing the echo canceller can know how fast the canceller must adapt to changes and also have a better measure of how reliable its echo cancellation will be. In this thesis the stability of the echo profile of the channel is measured. It is shown that the property of the channel with the greatest potential to rapidly change and cause noise after echo cancellation is the phase response of the channel. Due to this, the approach of this thesis is to measure the fluctuations in the phase of the channel response of a CATV network constructed in the lab. To measure the fluctuations in the phase response of the channel, a PLL (Phase Locked Loop) based circuit is designed and built on an FPGA (Field Programmable Gate Array) and connected to a model of a simple CATV network. The PLL circuit used to measure the phase fluctuations of the channel is designed to be able to measure changes occurring faster than 0.1 Hz and with a power higher than $10^{-7} \: V^2$. The circuit is able to capture data from the channel over a period of 90 seconds. Using this phase variation measurement circuit a series of experiments were performed on a model CATV DOCSIS network. It was found that many physical disturbances to the network had the effect of rapidly shifting the phase response of the network. Heating the cables in the network was found to shift the phase response upwards of $20000\:\mu$radians. Flexing the cables in the network was found to have a peak phase variation of $8000\: \mu$radians with similar effects found from walking over cables. Overall, it was clear that physical effects on the network had the propensity to rapidly shift the network response. Any echo canceller that is designed in the future will have to consider these effects when reporting the cancellation that it is able to achieve