Double Deadbeat Plus Repetitive Control Scheme for Microgrid System

Parallel connection of converters is a convenient choice when system capacity is to be increased. Parallel-connected voltage source converters, especially neutral point clamped converters, are one of the best choices for its range. However, with the parallel connectivity, the converter possesses a circulating current in its legs, which consequently threatens the safe operation of the system. To alleviate this circulating current problem, in this paper, a double deadbeat (DD) plus repetitive control (RC) scheme is proposed. The RC scheme is employed to mitigate the circulating currents and the DD loop control scheme is employed to achieve a high operating bandwidth for voltage and current characteristics. Furthermore, the DD loop is associated with an adaptive controlling technique, which adjusts internally by itself and provides better performance for nonlinear loads. The proposed DD method forces the equivalent system elements to be placed outside the closed loop, which does not affect the system stability. Initially, the system has been executed with a conventional proportional + integral scheme and then with the proposed DD + RC scheme. The proposed method is verified by implementing a Simulink model in the OPAL-RT platform. Furthermore, the proposed method is built with a prototype, and its results are explored

Double Deadbeat plus Repetitive Control Scheme for Microgrid System

Parallel connection of converters is a convenient choice when system capacity is to be increased. Parallel-connected voltage source converters, especially neutral point clamped converters, are one of the best choices for its range. However, with the parallel connectivity, the converter possesses a circulating current in its legs, which consequently threatens the safe operation of the system. To alleviate this circulating current problem, in this paper, a double deadbeat (DD) plus repetitive control (RC) scheme is proposed. The RC scheme is employed to mitigate the circulating currents and the DD loop control scheme is employed to achieve a high operating bandwidth for voltage and current characteristics. Furthermore, the DD loop is associated with an adaptive controlling technique, which adjusts internally by itself and provides better performance for nonlinear loads. The proposed DD method forces the equivalent system elements to be placed outside the closed loop, which does not affect the system stability. Initially, the system has been executed with a conventional proportional + integral scheme and then with the proposed DD + RC scheme. The proposed method is verified by implementing a Simulink model in the OPAL-RT platform. Furthermore, the proposed method is built with a prototype, and its results are explored

Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices

In a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is presented. Each of the inverters, connected in parallel, is conceived to be equipped with an FPGA that controls the Pulse-Width Modulation (PWM) waveform without intercommunication with the others. The hardware implemented is the same for every inverter; therefore, the addition of a new module does not require redesign, enhancing system modularity. The system has been simulated in a Simulink environment. To study its behavior and to improve the control method, simulations with two parallel-connected inverters have been firstly conducted, then additional simulations have been performed with increasing complexity to demonstrate the quality of the algorithm. The results prove the ability of the method proposed to limit the circulating currents to negligible values

Study of a synchronization system for distributed inverters conceived for FPGA devices

In a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is presented. Each of the inverters, connected in parallel, is conceived to be equipped with an FPGA that controls the Pulse-Width Modulation (PWM) waveform without intercommunication with the others. The hardware implemented is the same for every inverter; therefore, the addition of a new module does not require redesign, enhancing system modularity. The system has been simulated in a Simulink environment. To study its behavior and to improve the control method, simulations with two parallel-connected inverters have been firstly conducted, then additional simulations have been performed with increasing complexity to demonstrate the quality of the algorithm. The results prove the ability of the method proposed to limit the circulating currents to negligible values