List-coloring and sum-list-coloring problems on graphs

Graph coloring is a well-known and well-studied area of graph theory that has many applications. In this dissertation, we look at two generalizations of graph coloring known as list-coloring and sum-list-coloring. In both of these types of colorings, one seeks to first assign palettes of colors to vertices and then choose a color from the corresponding palette for each vertex so that a proper coloring is obtained. A celebrated result of Thomassen states that every planar graph can be properly colored from any arbitrarily assigned palettes of five colors. This result is known as 5-list-colorability of planar graphs. Albertson asked whether Thomassen\u27s theorem can be extended by precoloring some vertices which are at a large enough distance apart. Hutchinson asked whether Thomassen\u27s theorem can be extended by allowing certain vertices to have palettes of size less than five assigned to them. In this dissertation, we explore both of these questions and answer them in the affirmative for various classes of graphs. We also provide a catalog of small configurations with palettes of different prescribed sizes and determine whether or not they can always be colored from palettes of such sizes. These small configurations can be useful in reducing certain planar graphs to obtain more information about their structure. Additionally, we look at the newer notion of sum-list-coloring where the sum choice number is the parameter of interest. In sum-list-coloring, we seek to minimize the sum of varying sizes of palettes of colors assigned the vertices of a graph. We compute the sum choice number for all graphs on at most five vertices, present some general results about sum-list-coloring, and determine the sum choice number for certain graphs made up of cycles

Hypergraph matchings and designs

We survey some aspects of the perfect matching problem in hypergraphs, with particular emphasis on structural characterisation of the existence problem in dense hypergraphs and the existence of designs.Comment: 19 pages, for the 2018 IC

Extracting Data-Level Parallelism in High-Level Synthesis for Reconfigurable Architectures

High-Level Synthesis (HLS) tools are a set of algorithms that allow programmers to obtain implementable Hardware Description Language (HDL) code from specifications written high-level, sequential languages such as C, C++, or Java. HLS has allowed programmers to code in their preferred language while still obtaining all the benefits hardware acceleration has to offer without them needing to be intimately familiar with the hardware platform of the accelerator. In this work we summarize and expand upon several of our approaches to improve the automatic memory banking capabilities of HLS tools targeting reconfigurable architectures, namely Field-Programmable Gate Arrays or FPGA\u27s. We explored several approaches to automatically find the optimal partition factor and a usable banking scheme for stencil kernels including a tessellation based approach using multiple families of hyperplanes to do the partitioning which was able to find a better banking factor than current state-of-the-art methods and a graph theory methodology that allowed us to mathematically prove the optimality of our banking solutions. For non-stencil kernels we relaxed some of the conditions in our graph-based model to propose a best-effort solution to arbitrarily reduce memory access conflicts (simultaneous accesses to the same memory bank). We also proposed a non-linear transformation using prime factorization to convert a small subset of non-stencil kernels into stencil memory accesses, allowing us to use all previous work in memory partition to them. Our approaches were able to obtain better results than commercial tools and state-of-the-art algorithms in terms of reduced resource utilization and increased frequency of operation. We were also able to obtain better partition factors for some stencil kernels and usable baking schemes for non-stencil kernels with better performance than any applicable existing algorithm