Architectural-Physical Co-Design of 3D CPUs with Micro-Fluidic Cooling

The performance, energy efficiency and cost improvements due to traditional technology scaling have begun to slow down and present diminishing returns. Underlying reasons for this trend include fundamental physical limits of transistor scaling, the growing significance of quantum effects as transistors shrink, and a growing mismatch between transistors and interconnects regarding size, speed and power. Continued Moore's Law scaling will not come from technology scaling alone, and must involve improvements to design tools and development of new disruptive technologies such as 3D integration. 3D integration presents potential improvements to interconnect power and delay by translating the routing problem into a third dimension, and facilitates transistor density scaling independent of technology node. Furthermore, 3D IC technology opens up a new architectural design space of heterogeneously-integrated high-bandwidth CPUs. Vertical integration promises to provide the CPU architectures of the future by integrating high performance processors with on-chip high-bandwidth memory systems and highly connected network-on-chip structures. Such techniques can overcome the well-known CPU performance bottlenecks referred to as memory and communication wall. However the promising improvements to performance and energy efficiency offered by 3D CPUs does not come without cost, both in the financial investments to develop the technology, and the increased complexity of design. Two main limitations to 3D IC technology have been heat removal and TSV reliability. Transistor stacking creates increases in power density, current density and thermal resistance in air cooled packages. Furthermore the technology introduces vertical through silicon vias (TSVs) that create new points of failure in the chip and require development of new BEOL technologies. Although these issues can be controlled to some extent using thermal-reliability aware physical and architectural 3D design techniques, high performance embedded cooling schemes, such as micro-fluidic (MF) cooling, are fundamentally necessary to unlock the true potential of 3D ICs. A new paradigm is being put forth which integrates the computational, electrical, physical, thermal and reliability views of a system. The unification of these diverse aspects of integrated circuits is called Co-Design. Independent design and optimization of each aspect leads to sub-optimal designs due to a lack of understanding of cross-domain interactions and their impacts on the feasibility region of the architectural design space. Co-Design enables optimization across layers with a multi-domain view and thus unlocks new high-performance and energy efficient configurations. Although the co-design paradigm is becoming increasingly necessary in all fields of IC design, it is even more critical in 3D ICs where, as we show, the inter-layer coupling and higher degree of connectivity between components exacerbates the interdependence between architectural parameters, physical design parameters and the multitude of metrics of interest to the designer (i.e. power, performance, temperature and reliability). In this dissertation we present a framework for multi-domain co-simulation and co-optimization of 3D CPU architectures with both air and MF cooling solutions. Finally we propose an approach for design space exploration and modeling within the new Co-Design paradigm, and discuss the possible avenues for improvement of this work in the future

Reducing signal coupling and crosstalk in monolithic, mixed-signal integrated circuits

Master of ScienceDepartment of Electrical EngineeringWilliam B. KuhnDesigners of mixed-signal systems must understand coupling mechanisms at the system, PC board, package and integrated circuit levels to control crosstalk, and thereby minimize degradation of system performance. This research examines coupling mechanisms in a RF-targeted high-resistivity partially-depleted Silicon-on-Insulator (SOI) IC process and applying similar coupling mitigation strategies from higher levels of design, proposes techniques to reduce coupling between sub-circuits on-chip. A series of test structures was fabricated with the goal of understanding and reducing the electric and magnetic field coupling at frequencies up to C-Band. Electric field coupling through the active-layer and substrate of the SOI wafer is compared for a variety of isolation methods including use of deep-trench surrounds, blocking channel-stopper implant, blocking metal-fill layers and using substrate contact guard-rings. Magnetic coupling is examined for on-chip inductors utilizing counter-winding techniques, using metal shields above noisy circuits, and through the relationship between separation and the coupling coefficient. Finally, coupling between bond pads employing the most effective electric field isolation strategies is examined. Lumped element circuit models are developed to show how different coupling mitigation strategies perform. Major conclusions relative to substrate coupling are 1) substrates with resistivity 1 kΩ·cm or greater act largely as a high-K insulators at sufficiently high frequency, 2) compared to capacitive coupling paths through the substrate, coupling through metal-fill has little effect and 3) the use of substrate contact guard-rings in multi-ground domain designs can result in significant coupling between domains if proper isolation strategies such as the use of deep-trench surrounds are not employed. The electric field coupling, in general, is strongly dependent on the impedance of the active-layer and frequency, with isolation exceeding 80 dB below 100 MHz and relatively high coupling values of 40 dB or more at upper S-band frequencies, depending on the geometries and mitigation strategy used. Magnetic coupling was found to be a strong function of circuit separation and the height of metal shields above the circuits. Finally, bond pads utilizing substrate contact guard-rings resulted in the highest degree of isolation and the lowest pad load capacitance of the methods tested

Topical Workshop on Electronics for Particle Physics

The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities

Full Proceedings, 2018

Full conference proceedings for the 2018 International Building Physics Association Conference hosted at Syracuse University

An Investigation on Benefit-Cost Analysis of Greenhouse Structures in Antalya

Significant population increase across the world, loss of cultivable land and increasing demand for food put pressure on agriculture. To meet the demand, greenhouses are built, which are, light structures with transparent cladding material in order to provide controlled microclimatic environment proper for plant production. Conceptually, greenhouses are similar with manufacturing buildings where a controlled environment for manufacturing and production have been provided and proper spaces for standardized production processes have been enabled. Parallel with the trends in the world, particularly in southern regions, greenhouse structures have been increasingly constructed and operated in Turkey. A significant number of greenhouses are located at Antalya. The satellite images demonstrated that for over last three decades, there has been a continuous invasion of greenhouses on all cultivable land. There are various researches and attempts for the improvement of greenhouse design and for increasing food production by decreasing required energy consumption. However, the majority of greenhouses in Turkey are very rudimentary structures where capital required for investment is low, but maintenance requirements are high when compared with new generation greenhouse structures. In this research paper, life-long capital requirements for construction and operation of greenhouse buildings in Antalya has been investigated by using benefit-cost analysis study

Knowledge Capturing in Design Briefing Process for Requirement Elicitation and Validation

Knowledge capturing and reusing are major processes of knowledge management that deal with the elicitation of valuable knowledge via some techniques and methods for use in actual and further studies, projects, services, or products. The construction industry, as well, adopts and uses some of these concepts to improve various construction processes and stages. From pre-design to building delivery knowledge management principles and briefing frameworks have been implemented across project stakeholders: client, design teams, construction teams, consultants, and facility management teams. At pre-design and design stages, understanding the client’s needs and users’ knowledge are crucial for identifying and articulating the expected requirements and objectives. Due to underperforming results and missed goals and objectives, many projects finish with highly dissatisfied clients and loss of contracts for some organizations. Knowledge capturing has beneficial effects via its principles and methods on requirement elicitation and validation at the briefing stage between user, client and designer. This paper presents the importance and usage of knowledge capturing and reusing in briefing process at pre-design and design stages especially the involvement of client and user, and explores the techniques and technologies that are usable in briefing process for requirement elicitation