Copper Electrodeposition for 3D Integration

Two dimensional (2D) integration has been the traditional approach for IC integration. Due to increasing demands for providing electronic devices with superior performance and functionality in more efficient and compact packages, has driven the semiconductor industry to develop more advanced packaging technologies. Three-dimensional (3D) approaches address both miniaturization and integration required for advanced and portable electronic products. Vertical integration proved to be essential in achieving a greater integration flexibility of disparate technologies, reason for which a general trend of transition from 2D to 3D integration is currently being observed in the industry. 3D chip integration using through silicon via (TSV) copper is considered one of the most advanced technologies among all different types of 3D packaging technologies. Copper electrodeposition is one of technologies that enable the formation of TSV structures. Because of its well-known application for copper damascene, it was believed that its transfer to filling TSV vias would be easily adopted. However, as any new technology at its beginning, there are several challenges that need to be addressed and resolved before becoming a fully mature technology. This paper will address the TSV fill processes using copper electrodeposition, the advantages as well as difficulties associated with this technology and approaches taken to overcome them. Electrochemical characterization of the organics behavior and their effect on via filling will be presented. The effect of wafer design on process performance and throughput, including necessary process optimizations that are required for achieving void-free via filling while reducing the processing time, will be discussed.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/16838

다른 개수의 4가 암모늄 치환체를 가지는 콜린 기반 평탄제의 합성과 구리 전해도금에서의 적용

학위논문(석사) -- 서울대학교대학원 : 공과대학 화학생물공학부, 2022. 8. 김영규.고성능 반도체를 위한 3D 패키징 기술이 빠르게 발전함에 따라 효율적인 개별 소자들의 전기적 연결 방법 역시 중요해지고 있다. 대표적인 3D 패키징 기술인 실리콘 관통 전극 (TSV)은 적층된 다이들을 관통하는 바이아 홀(via hole)을 도전성 재료를 충전하여 전기적으로 연결하는 기술이다. TSV 기술에서 기기의 신뢰성을 확보하기 위하여 결함 없는 바이아 필링이 무엇보다도 중요하며, 이 과정에서 구리 전해 도금이 주로 사용되고 있다. 결함 없는 구리 전해 도금을 위해서는 도금 첨가제의 사용이 필수적이다. 유기 첨가제 중 하나인 평탄제는 바이아 표면의 위치에 따라 선택적으로 흡착하여 도금의 환원 속도를 조절한다. 이는 평탄제의 대류 의존 흡착 특성에 의해 바이아의 입구에서는 구리 이온의 환원을 억제하고 바이아 바닥에서는 환원을 유도하는 것을 의미한다. 전해 도금에서 평탄제의 영향을 알아보기 위해서는 평탄제의 구조에 따른 활성 분석이 필수적이다. 일반적인 평탄제의 구조는 3가 아민 또는 4가 암모늄 치환체를 포함하고 있으며, 이러한 치환체가 평탄제의 대류 의존 흡착 특성에 영향을 준다고 알려져 있다. 따라서 본 학위 논문에서는 서로 다른 개수의 3종의 4가 암모늄 치환체를 가지는 평탄제들을 합성하였고 구리 전해 도금에서의 영향을 전기화학적으로 확인하였다. 전기화학분석에서 합성된 모든 평탄제들이 대류 의존 흡착 특성을 나타내었다. 1개의 암모늄 치환체를 가지는 평탄제 A1는 각 2개, 3개의 암모늄 치환체를 가지는 평탄제 A2와 평탄제 A3보다 현저히 낮은 흡착 세기를 보였다. 평탄제 A2와 평탄제 A3의 흡착 세기는 큰 차이가 없었지만 마이크로바이아 채움 실험에서는 평탄제 A3이 근소하게 향상된 결과를 보였다. 암모늄 개수와 평탄제의 구조-특성의 관계를 알아보기 위해 세 평탄제의 농도를 조절하여 암모늄 그룹의 개수를 동일하게 한 결과, 평탄제A만이 초등각전착을 나타내었다. 이를 통해 암모늄 치환체의 개수 뿐만이 아니라 평탄제 A3의 구조 또한 구리 이온 흡착에 도움을 준다는 것을 확인하였다. 결과적으로 서로 다른 암모늄 치환체를 가지는 3종의 평탄제를 성공적으로 합성하였고 구조에 따른 구리도금에서의 특성을 확인하였다.As 3D packaging technology for high-functionality electric devices has been developing, effective electric interconnecting methods are also expected. Through-silicon via (TSV) is the representative 3D integration technology connecting stacked dies through vias filled with conductive material to work as the interconnection of electric signal path. Therefore, defect-free via filling should be achieved for reliability of electronics, and copper electrodeposition has been used as filling process. The use of organic additives is indispensable for Cu electrodeposition. Leveler is one of the organic additives which regulates rate of electrodeposition by its selective adsorption behavior on Cu surface. According to previous research, the convection dependent adsorption behavior of leveler is affected by its molecular structure, especially by the quaternary ammonium functional groups. In this thesis, structure-property relationship leveler for Cu electrodeposition was studied to develop levelers for optimized additive combination. Three levelers having different number of quaternary ammonium groups (Lev-A1, Lev-A2, and Lev-A3) were synthesized, and their electrochemical properties on Cu electrodeposition were analyzed. Convection-dependent adsorption behavior of levelers was observed, and the property was enhanced by number of quaternary ammonium groups. In via filling test, Lev-A3 resulted in most effective filling with highest thickness ratio value and superconformal filling profile. In conclusion, three levelers having one, two, and three quaternary ammonium groups were successfully synthesized, and the influence of quaternary ammonium group on convection dependent adsorption was studied.1. Introduction 1 1.1. 3D interconnection technology 1 1.2. Cu electrodeposition 4 1.3. Organic additive system in Cu electrodeposition 8 1.4. Structure-property relationship of leveler 12 2. General procedure for electrochemical analyses 15 2.1. Electrochemical analyses of synthesized levelers 15 2.2. Via-filling test by Cu electrodeposition 17 3. Results and Discussion 18 3.1 Synthesis of Lev-A1, Lev-A2, and Lev-A3 18 3.1.1 Synthesis of Lev-A1 18 3.1.2 Synthesis of Lev-A2 19 3.1.3 Synthesis of Lev-A3 20 3.2 Electrochemical analyses 22 3.3. Via filling test 28 4. Conclusion 32 5. Experiemental 34 5.1. General procedure 34 5.2. General synthetic methods 35 5.2.1.Allylation 35 5.2.2 Epoxidation 37 5.2.3 Amination 40 5.2.4 Allylation 42 REFERENCES 45 APPENDICES 49 ABSTRACT IN KOREAN 73석

High-aspect-ratio copper via filling used for three-dimensional chip stacking

Through-chip electrodes for three-dimensional packaging can offer short interconnection and reduced signal delay. Formation of suitable vias by electrodeposition into cavities presents a filling problem similar to that encountered in the damascene process. Because via dimensions for through-chip filling are larger and have a higher aspect ratio relative to features in damascene, process optimization requires modification of existing superconformal plating baths and plating parameters. In this study, copper filling of high-aspect-ratio through-chip vias was investigated and optimized with respect to plating bath composition and applied current wavetrain. Void-free vias 70 mu m deep and 10 mu m wide were formed in 60 min using additives in combination with pulse-reverse current and dissolved-oxygen enrichment. The effects of reverse current and dissolved oxygen on the performance of superfilling additives is discussed in terms of their effects on formation, destruction, and distribution of a Cu(I) thiolate accelerant. (c) 2005 The Electrochemical Society. All rights reserved. </p

Integration of Electrodeposited Ni-Fe in MEMS with Low-Temperature Deposition and Etch Processes

This article presents a set of low-temperature deposition and etching processes for the integration of electrochemically deposited Ni-Fe alloys in complex magnetic microelectromechanical systems, as Ni-Fe is known to suffer from detrimental stress development when subjected to excessive thermal loads. A selective etch process is reported which enables the copper seed layer used for electrodeposition to be removed while preserving the integrity of Ni-Fe. In addition, a low temperature deposition and surface micromachining process is presented in which silicon dioxide and silicon nitride are used, respectively, as sacrificial material and structural dielectric. The sacrificial layer can be patterned and removed by wet buffered oxide etch or vapour HF etching. The reported methods limit the thermal budget and minimise the stress development in Ni-Fe. This combination of techniques represents an advance towards the reliable integration of Ni-Fe components in complex surface micromachined magnetic MEMS

Comparative analysis of the polarization and morphological characteristics of electrochemically produced powder forms of the intermediate metals

The polarization and morphological characteristics of powder forms of the group of the intermediate metals were examined by the analysis of silver and copper electrodeposition processes at high overpotentials. The pine-like dendrites constructed from the corncob-like forms, which are very similar to each other, were obtained by electrodeposition of these metals at the overpotential belonging to the plateaus of the limiting diffusion current density. A completely different situation was observed by the electrodeposition of silver and copper at the overpotential outside the plateaus of the limiting diffusion current density in the zone with the fast increase in current density with the overpotential. Silver dendrites, which were very similar to silver and copper dendrites obtained inside the plateaus of the limiting diffusion current density, were obtained at the overpotential outside the plateau. Due to the lower overpotential for hydrogen evolution for copper, hydrogen produced during the copper electrodeposition process strongly affected the surface morphology of copper. The same shape polarization curves with completely different surface morphologies of Cu and Ag electrodeposited at overpotentials after the inflection point clearly indicate the importance of morphological analysis in the investigation of polarization characteristics of the electrodeposition systems. The role of hydrogen as a crucial parameter in the continuous change of copper surface morphology from dendrites to honeycomb-like structures was investigated in detail. On the basis of this analysis, the transitional character of the intermediate metals between the normal and inert metals was considered. The typical powder forms characterising electrodeposition of the intermediate metals were also defined and systematized

Numerical modelling of electrodeposition process for printed circuit boards manufacturing

Printed circuit boards (PCBs) are used extensively in electronic products to connect assembled components within a system. The so-called vertical interconnect access (via) is a vertical hole or cavity in the PCB filled with metal to facilitate conductivity. The current trend, particularly for high technology products (e.g., 3D packaging), is to manufacture PCBs with high aspect ratio (AR) vias. Typically, the size of such a via is at the micrometer scale (this is why they are termed micro-vias). The most widely used technique for manufacturing micro-vias is electrodeposition of metal (e.g., copper), where the PCB is immersed into a plating cell filled with an electrolyte solution. Using standard conditions, electrodeposition usually does not produce micro-vias with the required quality. This is due to a lack of copper ion transport into the via. This has lead to studies of various ways of enhancing the ion transport. This thesis documents the results from a modelling study into the electrodeposition processes for fabricating high aspect ratio micro-vias. This includes basic electrodeposition and techniques that enhance ion transport such as forced convection (using a pump) and acoustic streaming (using transducers). In this work, a novel numerical method for explicitly tracking the interface between the deposited metal and the electrolyte is implemented and validated under the conditions of basic electrodeposition using experimental data. Results from a parametric study have established a set of design rules for micro-vias fabrication. When ion transport is enhanced by forced convection (e.g., pumping) in the plating cell, we apply a multi-scale modelling methodology that provides interaction between models at the macro level (the plating cell) and the micro level (the interior of a via). Numerical simulations can then be used to verify how ion transport into the micro-via is improved. These results can then be used to identify process conditions for the plating cell which will result in the required flow behaviour at the micro-via. Megasonic agitation can also be used to enhance electrolyte convection in the plating cell. This is achieved by placing megasonic transducers into the plating cell. This leads to several phenomena, one of which is known as the acoustic streaming. Models have been developed for predicting megasonic agitation both at the macro and micro-scales, and a number of designs have been investigated for both open and blind micro-vias

Nanotemplated platinum fuel cell catalysts and copper-tin lithium battery anode materials for microenergy devices

Nanotemplated materials have significant potential for applications in energy conversion and storage devices due to their unique physical properties. Nanostructured materials provide additional electrode surface area beneficial for energy conversion or storage applications with short path lengths for electronic and ionic transport and thus the possibility of higher reaction rates. We report on the use of controlled growth of metal and alloy electrodeposited templated nanostructures for energy applications. Anodic aluminium oxide templates fabricated on Si for energy materials integration with electronic devices and their use for fuel cell and battery materials deposition is discussed. Nanostructured Pt anode catalysts for methanol fuel cells are shown. Templated CuSn alloy anodes that possess high capacity retention with cycling for lithium microbattery integration are also presented

Scalable electrodeposition of liquid metal from an acetonitrile-based electrolyte for highly-integrated stretchable electronics

For the advancement of highly-integrated stretchable electronics, the development of scalable sub-micrometer conductor patterning is required. Eutectic gallium indium EGaIn is an attractive conductor for stretchable electronics, as its liquid metallic character grants it high electrical conductivity upon deformation. However, its high surface energy precludes patterning it with (sub)-micron resolution. Herein, we overcome this limitation by reporting for the first time the electrodeposition of EGaIn. We use a non-aqueous acetonitrile-based electrolyte that exhibits high electrochemical stability and chemical orthogonality. The electrodeposited material led to low-resistance lines that remained stable upon (repeated) stretching to a 100 percent strain. Because electrodeposition benefits from the resolution of mature nanofabrication methods used to pattern the base metal, the proposed bottom-up approach achieved a record-high density integration of EGaIn regular lines of 300 nm half-pitch on an elastomer substrate by plating on a gold seed layer pre-patterned by nanoimprinting. Moreover, vertical integration was enabled by filling high aspect ratio vias. This capability was conceptualized by the fabrication of an omnidirectionally stretchable 3D electronic circuit, and demonstrates a soft-electronic analogue of the stablished damascene process used to fabricate microchip interconnects. Overall, this work proposes a simple route to address the challenge of metallization in highly integrated (3D) stretchable electronics.Comment: The main manuscript contains 29 pages and 5 figures. The supporting information, attached to the document after the references, contains 8 pages and 8 figures. The manuscript is submitted to the journal Advanced Materials. Francisco Molina-Lopez an Jan Fransaer share the role of corresponding autho