A decoding procedure for the Reed-Solomon codes

A decoding procedure is described for the (n,k) t-error-correcting Reed-Solomon (RS) code, and an implementation of the (31,15) RS code for the I4-TENEX central system. This code can be used for error correction in large archival memory systems. The principal features of the decoder are a Galois field arithmetic unit implemented by microprogramming a microprocessor, and syndrome calculation by using the g(x) encoding shift register. Complete decoding of the (31,15) code is expected to take less than 500 microsecs. The syndrome calculation is performed by hardware using the encoding shift register and a modified Chien search. The error location polynomial is computed by using Lin's table, which is an interpretation of Berlekamp's iterative algorithm. The error location numbers are calculated by using the Chien search. Finally, the error values are computed by using Forney's method

CAMAC bulletin: A publication of the ESONE Committee Issue #8 November 1973 Supplement

CAMAC is a means of interconnecting many peripheral devices through a digital data highway to a data processing device such as a computer

Analysis and classification of microprogrammed computers.

Massachusetts Institute of Technology. Dept. of Electrical Engineering. Thesis. 1972. M.S.MICROFICHE COPY ALSO AVAILABLE IN BARKER ENGINEERING LIBRARY.Includes bibliographical references.M.S

Research in the effective implementation of guidance computers with large scale arrays Interim report

Functional logic character implementation in breadboard design of NASA modular compute

CAMAC bulletin: A publication of the ESONE Committee Issue #8 November 1973 Supplement

CAMAC is a means of interconnecting many peripheral devices through a digital data highway to a data processing device such as a computer

Spacelab data management subsystem phase B study

The Spacelab data management system is described. The data management subsystem (DMS) integrates the avionics equipment into an operational system by providing the computations, logic, signal flow, and interfaces needed to effectively command, control, monitor, and check out the experiment and subsystem hardware. Also, the DMS collects/retrieves experiment data and other information by recording and by command of the data relay link to ground. The major elements of the DMS are the computer subsystem, data acquisition and distribution subsystem, controls and display subsystem, onboard checkout subsystem, and software. The results of the DMS portion of the Spacelab Phase B Concept Definition Study are analyzed

Development and implementation of hardware and software for a minicomputer based programmable interval timer for use in point process analysis of neuronal action potentials

A precision programmable interval timer (PIT) for use in point process analysis of the neutronal action potentials derived from multiple extracellular electrode arrays is described. The PIT is based on a commercially available LSI package, INS8253 and is interfaced to a Data General (DG) microNova 16-bit microcomputer via a DG General Purpose Interface (GPI) board. The programmable clock periods range from 1 μsec to 10 msec in decade multiples, offering a total timing duration of 65 msec to 650 sec. The PIT operates in two Modes : 1. Count-down timer 2. Elapsed time timer (Event resettable timer) Clock-overrun and data lost flags are provided. Testing and applications software have also been developed

Measurements, Models, Systems and Design

531 s.