Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study

This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber line specifications, i.e 12-bit resolution within a 20-MHz signal bandwidth. These modulators have been synthesized using a new methodology that is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. This method allows to place the zeroes/poles of the loop-filter transfer function in an optimal way and to reduce the number of analog components, namely, transconductors and/or amplifiers, resistors, capacitors and digital-to-analog converters. This leads to more efficient topologies in terms of circuitry complexity, power consumption and robustness with respect to circuit non-idealities. A comparison study of the synthesized architectures is done considering their sensitivity to most critical circuit error mechanisms. Time-domain behavioral simulations are shown to validate the presented approach.Ministerio de Educación y Ciencia TEC2004-01752/MI

Calibration of DAC mismatch errors in sigma delta ADCs based on a sine-wave measurement

We present an offline calibration procedure to correct the nonlinearity due element mismatch in the digital-to-analog converter (DAC) of a multibit Sigma Delta-modulation A/D converter. The calibration uses a single measurement on a sinusoidal input signal, from which the DAC errors can be estimated. The main quality of the calibration method is that it can be implemented completely in the digital domain (or in software) and does not intervene in any way in the analog modulator circuit. This way, the technique is a powerful tool for verifying and debugging designs. Due to the simplicity of the method, it may be also a viable approach for factory calibration

Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC

This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. Derived expressions show that the jitter-induced noise power can be separated into two main components: one that depends on the modulator loop filter transfer function and the other one due to the input signal parameters, i.e amplitude and frequency. The latter component, not considered in previous approaches, allows us to accurately predict the resolution loss caused by jitter, showing effects not taken into account up to now in literature which are specially critical in broadband telecom applications. Moreover, the use of state-space formulation makes the analysis quite general and applicable to either cascade or single-loop architectures. Time-domain simulations of several modulator topologies intended for VDSL application are given to validate the presented analysis.Ministerio de Educación y Ciencia TEC2004-01752/MIC, TIC2003-0235

Sigma-Delta control of charge trapping in heterogeneous devices

Dielectric charging represents a major reliability issue in a variety of semiconductor devices. The accumulation of charge in dielectric layers of a device often alters its performance, affecting its circuital features and even reducing its effective lifetime. Although several contributions have been made in order to mitigate the undesired effects of charge trapping on circuit performance, dielectric charge trapping still remains an open reliability issue in several applications. The research work underlying this Thesis mainly focuses on the design, analysis and experimental validation of control strategies to compensate dielectric charging in heterogeneous devices. These control methods are based on the application of specifically designed voltage waveforms that produce complementary effects on the charge dynamics. Using sigma-delta loops, these controls allow to set and maintain, within some limits, the net trapped charge in the dielectric to desired levels that can be changed with time. This allows mitigating long-term reliability issues such as capacitance-voltage (C-V) shifts in MOS and MIM capacitors. Additionally, the bit streams generated by the control loops provide real-time information on the evolution of the trapped charge. The proposed controls also allow compensating the effects of the charge trapping due to external disturbances such as radiation. This has been demonstrated experimentally with MOS capacitors subjected to various types of ionizing radiation (X-rays and gamma rays) while a charge control is being applied. This approach opens up the possibility of establishing techniques for active compensation of radiation-induced charge in MOS structures as well as a new strategy for radiation sensing. A modeling strategy to characterize the dynamics of the dielectric charge in MOS capacitors is also presented. The diffusive nature of the charge trapping phenomena allows their behavioral characterization using Diffusive Representation tools. The experiments carried out demonstrate a very good matching between the predictions of the model and the experimental results obtained. The time variations in the charge dynamics due to changes in the volatges applied and/or due to external disturbances have been also investigated and modeled. Moreover, the charge dynamics of MOS capacitors under sigma-delta control is analyzed using the tools of Sliding Mode Controllers for an infinite sampling frequency approximation. A phenomenological analytical model is obtained which allows to predict and analyze the sequence of control signals. This model has been successfully validated with experimental data. Finally, the above control strategies are extended to other devices such as eMIM capacitors and perovskite solar cells. Preliminary results including open loop and closed loop control experiments are presented. These results demonstrate that the application of the controls allows to set and stabilize both the C-V characteristic of an eMIM capacitor and the current-voltage characteristic (J-V) of a perovskite solar cell.La carga atrapada en dieléctricos suele implicar un problema importante de fiabilidad en muchos dispositivos semiconductores. La acumulación de dicha carga, normalmente provocada por las tensiones aplicadas durante el uso del dispositivo, suele alterar el rendimiento de éste con el tiempo, afectar sus prestaciones a nivel de circuital e, incluso, reducir su vida útil. Aunque durante años se han realizado muchos trabajos para mitigar sus efectos no deseados, sobre todo a nivel circuital, la carga atrapada en dieléctricos sigue siendo un problema abierto que frena la aplicabilidad práctica de algunos dispositivos. El trabajo de investigación realizado en esta Tesis se centra principalmente en el diseño, análisis y validación experimental de estrategias de control para compensar la carga atrapada en dieléctricos de diversos tipos de dispositivos, incluyendo condensadores MOS, condensadores MIM fabricados con nanotecnología y dispositivos basados en perovskitas. Los controles propuestos se basan en utilizar formas de onda de tensión, específicamente diseñadas, que producen efectos complementarios en la dinámica de la carga. Mediante el uso de lazos sigma-delta, estos controles permiten establecer y mantener, dentro de unos límites, la carga neta atrapada en el dieléctrico a valores prefijados, que pueden cambiarse con el tiempo. Esto permite mitigar problemas de fiabilidad a largo plazo como por ejemplo las derivas de la curva capacidad-tensión (C-V) en condensadores MOS y MIM. Adicionalmente, las tramas de bits generadas por los lazos de control proporcionan información en tiempo real sobre la evolución de la carga. Los controles propuestos permiten también compensar los efectos de la carga atrapada en dieléctricos debida a perturbaciones externas como la radiación. Esto se ha demostrado experimentalmente con condesadores MOS sometidos a diversos tipos de radiación ionizante (rayos X y gamma) mientras se les aplicaba un control de carga. Este resultado abre la posibilidad tanto de establecer técnicas de compensación activa de carga inducida por radiación en estructuras MOS, como una nueva estrategia de sensado de radiación. Se presenta también una estrategia de modelado para caracterizar la dinámica de la carga dieléctrica en condensadores MOS. La naturaleza difusiva de los fenómenos de captura y eliminación de carga en dieléctricos permite caracterizar dichos fenómenos empleando herramientas de Representación Difusiva. Los experimentos realizados demuestran una muy buena correspondencia entre las predicciones del modelo y los resultados experimentales obtenidos. Se muestra también como las variaciones temporales de los modelos son debidas a cambios en las formas de onda de actuación del dispositivo y/o a perturbaciones externas. Además, la dinámica de carga en condensadores MOS bajo control sigma-delta se analiza utilizando herramientas de control en modo deslizante (SMC), considerando la aproximación de frecuencia de muestreo infinita. Con ello se obtiene un modelo analítico simplificado que permite predecir y analizar con éxito la secuencia de señales de control. Este modelo se ha validado satisfactoriamente con datos experimentales. Finalmente, las estrategias de control anteriores se han extendido a otros dispositivos susceptibles de sufrir efectos de carga atrapada que pueden afectar su fiabilidad. Así, se han llevado a cabo experimentos preliminares cuyos resultados demuestran que la aplicación de controles de carga permite controlar y estabilizar la característica C-V de un condensador eMIM y la característica corriente-tensión (J-V) de una célula solar basada en perovskitas.Postprint (published version

Delta-Sigma Digitization and Optical Coherent Transmission of DOCSIS 3.1 Signals in Hybrid Fiber Coax Networks

We first demonstrate delta-sigma digitization and coherent transmission of data over cable system interface specification (DOCSIS) 3.1 signals in a hybrid fiber coax (HFC) network. Twenty 192-MHz DOCSIS 3.1 channels with modulation up to 16384QAM are digitized by a low-pass cascade resonator feedback (CRFB) delta-sigma analog-to-digital converter (ADC) and transmitted over 80 km fiber using coherent single-λ 128-Gb/s dual-polarization (DP)-QPSK and 256-Gb/s DP-16QAM optical links. Both one-bit and two-bit delta-sigma digitization are implemented and supported by the QPSK and 16QAM coherent transmission systems, respectively. To facilitate its practical application in access networks, the coherent system is built using a low-cost narrowband optical modulator and RF amplifiers. Modulation error ratio (MER) larger than 50 dB is successfully demonstrated for all 20 DOCSIS 3.1 channels, and high order modulation up to 16384QAM is delivered over fiber for the first time in HFC networks. The raw DOCSIS data capacity is 54 Gb/s with net user information ~45 Gb/s. Moreover, the bit error ratio (BER) tolerance is evaluated by measuring the MER performance as BER increases. Negligible MER degradation is observed for BER up to 1.5 × 10−6 and 1.7 × 10−4, for one-bit and two-bit digitization, respectively