19 research outputs found
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Directed Placement for mVLSI Devices
Continuous-flow microfluidic devices based on integrated channel networks are becoming increasingly prevalent in research in the biological sciences. At present, these devices are physically laid out by hand by domain experts who understand both the underlying technology and the biological functions that will execute on fabricated devices. The lack of a design science that is specific to microfluidic technology creates a substantial barrier to entry. To address this concern, this article introduces Directed Placement, a physical design algorithm that leverages the natural "directedness" in most modern microfluidic designs: fluid enters at designated inputs, flows through a linear or tree-based network of channels and fluidic components, and exits the device at dedicated outputs. Directed placement creates physical layouts that share many principle similarities to those created by domain experts. Directed placement allows components to be placed closer to their neighbors compared to existing layout algorithms based on planar graph embedding or simulated annealing, leading to an average reduction in laid-out fluid channel length of 91% while improving area utilization by 8% on average. Directed placement is compatible with both passive and active microfluidic devices and is compatible with a variety of mainstream manufacturing technologies
Placement and routing for cross-referencing digital microfluidic biochips.
Xiao, Zigang."October 2010."Thesis (M.Phil.)--Chinese University of Hong Kong, 2011.Includes bibliographical references (leaves 62-66).Abstracts in English and Chinese.Abstract --- p.iAcknowledgement --- p.viChapter 1 --- Introduction --- p.1Chapter 1.1 --- Microfluidic Technology --- p.2Chapter 1.1.1 --- Continuous Flow Microfluidic System --- p.2Chapter 1.1.2 --- Digital Microfluidic System --- p.2Chapter 1.2 --- Pin-Constrained Biochips --- p.4Chapter 1.2.1 --- Droplet-Trace-Based Array Partitioning Method --- p.5Chapter 1.2.2 --- Broadcast-addressing Method --- p.5Chapter 1.2.3 --- Cross-Referencing Method --- p.6Chapter 1.2.3.1 --- Electrode Interference in Cross-Referencing Biochips --- p.7Chapter 1.3 --- Computer-Aided Design Techniques for Biochip --- p.8Chapter 1.4 --- Placement Problem in Biochips --- p.8Chapter 1.5 --- Droplet Routing Problem in Cross-Referencing Biochips --- p.11Chapter 1.6 --- Our Contributions --- p.14Chapter 1.7 --- Thesis Organization --- p.15Chapter 2 --- Literature Review --- p.16Chapter 2.1 --- Introduction --- p.16Chapter 2.2 --- Previous Works on Placement --- p.17Chapter 2.2.1 --- Basic Simulated Annealing --- p.17Chapter 2.2.2 --- Unified Synthesis Approach --- p.18Chapter 2.2.3 --- Droplet-Routing-Aware Unified Synthesis Approach --- p.19Chapter 2.2.4 --- Simulated Annealing Using T-tree Representation --- p.20Chapter 2.3 --- Previous Works on Routing --- p.21Chapter 2.3.1 --- Direct-Addressing Droplet Routing --- p.22Chapter 2.3.1.1 --- A* Search Method --- p.22Chapter 2.3.1.2 --- Open Shortest Path First Method --- p.23Chapter 2.3.1.3 --- A Two Phase Algorithm --- p.24Chapter 2.3.1.4 --- Network-Flow Based Method --- p.25Chapter 2.3.1.5 --- Bypassibility and Concession Method --- p.26Chapter 2.3.2 --- Cross-Referencing Droplet Routing --- p.28Chapter 2.3.2.1 --- Graph Coloring Method --- p.28Chapter 2.3.2.2 --- Clique Partitioning Method --- p.30Chapter 2.3.2.3 --- Progressive-ILP Method --- p.31Chapter 2.4 --- Conclusion --- p.32Chapter 3 --- CrossRouter for Cross-Referencing Biochip --- p.33Chapter 3.1 --- Introduction --- p.33Chapter 3.2 --- Problem Formulation --- p.34Chapter 3.3 --- Overview of Our Method --- p.35Chapter 3.4 --- Net Order Computation --- p.35Chapter 3.5 --- Propagation Stage --- p.36Chapter 3.5.1 --- Fluidic Constraint Check --- p.38Chapter 3.5.2 --- Electrode Constraint Check --- p.38Chapter 3.5.3 --- Handling 3-pin net --- p.44Chapter 3.5.4 --- Waste Reservoir --- p.45Chapter 3.6 --- Backtracking Stage --- p.45Chapter 3.7 --- Rip-up and Re-route Nets --- p.45Chapter 3.8 --- Experimental Results --- p.46Chapter 3.9 --- Conclusion --- p.47Chapter 4 --- Placement in Cross-Referencing Biochip --- p.49Chapter 4.1 --- Introduction --- p.49Chapter 4.2 --- Problem Formulation --- p.50Chapter 4.3 --- Overview of the method --- p.50Chapter 4.4 --- Dispenser and Reservoir Location Generation --- p.51Chapter 4.5 --- Solving Placement Problem Using ILP --- p.51Chapter 4.5.1 --- Constraints --- p.53Chapter 4.5.1.1 --- Validity of modules --- p.53Chapter 4.5.1.2 --- Non-overlapping and separation of Modules --- p.53Chapter 4.5.1.3 --- Droplet-Routing length constraint --- p.54Chapter 4.5.1.4 --- Optical detector resource constraint --- p.55Chapter 4.5.2 --- Objective --- p.55Chapter 4.5.3 --- Problem Partition --- p.56Chapter 4.6 --- Pin Assignment --- p.56Chapter 4.7 --- Experimental Results --- p.57Chapter 4.8 --- Conclusion --- p.59Chapter 5 --- Conclusion --- p.60Bibliography --- p.6
Droplet routing for digital microfluidic biochips based on microelectrode dot array architecture
A digital microfluidic biochip (DMFB) is a device that digitizes fluidic samples into tiny droplets and operates chemical processes on a single chip. Movement control of droplets can be realized by using electrowetting-on-dielectric (EWOD) technology. DMFBs have high configurability, high sensitivity, low cost and reduced human error as well as a promising future in the applications of point-of-care medical diagnostic, and DNA sequencing. As the demands of scalability, configurability and portability increase, a new DMFB architecture called Microelectrode Dot Array (MEDA) has been introduced recently to allow configurable electrodes shape and more precise control of droplets.
The objective of this work is to investigate a routing algorithm which can not only handle the routing problem for traditional DMFBs, but also be able to route different sizes of droplets and incorporate diagonal movements for MEDA. The proposed droplet routing algorithm is based on 3D-A* search algorithm. The simulation results show that the proposed algorithm can reduce the maximum latest arrival time, average latest arrival time and total number of used cells. By enabling channel-based routing in MEDA, the equivalent total number of used cells can be significantly reduced. Compared to all existing algorithms, the proposed algorithm can achieve so far the least average latest arrival time
A Methodology to Design Pipelined Simulated Annealing Kernel Accelerators on Space-Borne Field-Programmable Gate Arrays
Increased levels of science objectives expected from spacecraft systems necessitate the ability to carry out fast on-board autonomous mission planning and scheduling. Heterogeneous radiation-hardened Field Programmable Gate Arrays (FPGAs) with embedded multiplier and memory modules are well suited to support the acceleration of scheduling algorithms. A methodology to design circuits specifically to accelerate Simulated Annealing Kernels (SAKs) in event scheduling algorithms is shown. The main contribution of this thesis is the low complexity scoring calculation used for the heuristic mapping algorithm used to balance resource allocation across a coarse-grained pipelined data-path. The methodology was exercised over various kernels with different cost functions and problem sizes. These test cases were benchedmarked for execution time, resource usage, power, and energy on a Xilinx Virtex 4 LX QR 200 FPGA and a BAE RAD 750 microprocessor
Recent Trends in Communication Networks
In recent years there has been many developments in communication technology. This has greatly enhanced the computing power of small handheld resource-constrained mobile devices. Different generations of communication technology have evolved. This had led to new research for communication of large volumes of data in different transmission media and the design of different communication protocols. Another direction of research concerns the secure and error-free communication between the sender and receiver despite the risk of the presence of an eavesdropper. For the communication requirement of a huge amount of multimedia streaming data, a lot of research has been carried out in the design of proper overlay networks. The book addresses new research techniques that have evolved to handle these challenges
Factories of the Future
Engineering; Industrial engineering; Production engineerin
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ReSCon '12, Research Student Conference: Book of Abstracts
The fifth SED Research Student Conference (ReSCon2012) was hosted over three days, 18-20 June 2012, in the Hamilton Centre at Brunel University. The conference consisted of 130 oral and 70 poster presentations, based on the high quality and diverse research being conducted within the School of Engineering and Design by postgraduate research students. The conference is held annually, and ReSCon plays a key role in contributing to research and innovations within the School