6 research outputs found
Dynamic reconfiguration frameworks for high-performance reliable real-time reconfigurable computing
The sheer hardware-based computational performance and programming flexibility
offered by reconfigurable hardware like Field-Programmable Gate Arrays (FPGAs)
make them attractive for computing in applications that require high performance,
availability, reliability, real-time processing, and high efficiency. Fueled by fabrication
process scaling, modern reconfigurable devices come with ever greater quantities of
on-chip resources, allowing a more complex variety of applications to be developed.
Thus, the trend is that technology giants like Microsoft, Amazon, and Baidu now
embrace reconfigurable computing devices likes FPGAs to meet their critical
computing needs. In addition, the capability to autonomously reprogramme these
devices in the field is being exploited for reliability in application domains like
aerospace, defence, military, and nuclear power stations. In such applications, real-time
computing is important and is often a necessity for reliability. As such, applications and
algorithms resident on these devices must be implemented with sufficient
considerations for real-time processing and reliability.
Often, to manage a reconfigurable hardware device as a computing platform for a
multiplicity of homogenous and heterogeneous tasks, reconfigurable operating systems
(ROSes) have been proposed to give a software look to hardware-based computation.
The key requirements of a ROS include partitioning, task scheduling and allocation,
task configuration or loading, and inter-task communication and synchronization.
Existing ROSes have met these requirements to varied extents. However, they are
limited in reliability, especially regarding the flexibility of placing the hardware circuits
of tasks on device’s chip area, the problem arising more from the partitioning
approaches used. Indeed, this problem is deeply rooted in the static nature of the on-chip
inter-communication among tasks, hampering the flexibility of runtime task
relocation for reliability.
This thesis proposes the enabling frameworks for reliable, available, real-time,
efficient, secure, and high-performance reconfigurable computing by providing
techniques and mechanisms for reliable runtime reconfiguration, and dynamic inter-circuit communication and synchronization for circuits on reconfigurable hardware.
This work provides task configuration infrastructures for reliable reconfigurable
computing. Key features, especially reliability-enabling functionalities, which have
been given little or no attention in state-of-the-art are implemented. These features
include internal register read and write for device diagnosis; configuration operation
abort mechanism, and tightly integrated selective-area scanning, which aims to
optimize access to the device’s reconfiguration port for both task loading and error
mitigation.
In addition, this thesis proposes a novel reliability-aware inter-task communication
framework that exploits the availability of dedicated clocking infrastructures in a
typical FPGA to provide inter-task communication and synchronization. The clock
buffers and networks of an FPGA use dedicated routing resources, which are distinct
from the general routing resources. As such, deploying these dedicated resources for
communication sidesteps the restriction of static routes and allows a better relocation
of circuits for reliability purposes.
For evaluation, a case study that uses a NASA/JPL spectrometer data processing
application is employed to demonstrate the improved reliability brought about by the
implemented configuration controller and the reliability-aware dynamic
communication infrastructure. It is observed that up to 74% time saving can be achieved
for selective-area error mitigation when compared to state-of-the-art vendor
implementations. Moreover, an improvement in overall system reliability is observed
when the proposed dynamic communication scheme is deployed in the data processing
application.
Finally, one area of reconfigurable computing that has received insufficient
attention is security. Meanwhile, considering the nature of applications which now turn
to reconfigurable computing for accelerating compute-intensive processes, a high
premium is now placed on security, not only of the device but also of the applications,
from loading to runtime execution. To address security concerns, a novel secure and
efficient task configuration technique for task relocation is also investigated, providing
configuration time savings of up to 32% or 83%, depending on the device; and resource
usage savings in excess of 90% compared to state-of-the-art
Facilitating Flexible Link Layer Protocols for Future Wireless Communication Systems
This dissertation addresses the problem of designing link layer protocols
which are flexible enough to accommodate the demands offuture wireless
communication systems (FWCS).We show that entire link layer protocols with
diverse requirements and responsibilities can be composed out of
reconfigurable and reusable components.We demonstrate this by designing and
implementinga novel concept termed Flexible Link Layer (FLL)
architecture.Through extensive simulations and practical experiments, we
evaluate a prototype of the suggested architecture in both
fixed-spectrumand dynamic spectrum access (DSA) networks.
FWCS are expected to overcome diverse challenges including the continual
growthin traffic volume and number of connected devices.Furthermore, they
are envisioned to support a widerange of new application requirements and
operating conditions.Technology trends, including smart homes,
communicating machines, and vehicularnetworks, will not only grow on a
scale that once was unimaginable, they will also become the predominant
communication paradigm, eventually surpassing today's human-produced
network traffic.
In order for this to become reality, today's systems have to evolve in many
ways.They have to exploit allocated resources in a more efficient and
energy-conscious manner.In addition to that, new methods for spectrum
access and resource sharingneed to be deployed.Having the diversification
of applications and network conditions in mind, flexibility at all layers
of a communication system is of paramount importance in order to meet the
desired goals.
However, traditional communication systems are often designed with specific
and distinct applications in mind. Therefore, system designers can tailor
communication systems according to fixedrequirements and operating
conditions, often resulting in highly optimized but inflexible
systems.Among the core problems of such design is the mix of data transfer
and management aspects.Such a combination of concerns clearly hinders the
reuse and extension of existing protocols.
To overcome this problem, the key idea explored in this dissertation is a
component-based design to facilitate the development of more flexible and
versatile link layer protocols.Specifically, the FLL architecture,
suggested in this dissertation, employs a generic, reconfigurable data
transfer protocol around which one or more complementary protocols, called
link layer applications, are responsible for management-related aspects of
the layer.
To demonstrate the feasibility of the proposed approach, we have designed
andimplemented a prototype of the FLL architecture on the basis ofa
reconfigurable software defined radio (SDR) testbed.Employing the SDR
prototype as well as computer simulations, thisdissertation describes
various experiments used to examine a range of link layerprotocols for both
fixed-spectrum and DSA networks.
This dissertation firstly outlines the challenges faced by FWCSand
describes DSA as a possible technology component for their construction.It
then specifies the requirements for future DSA systemsthat provide the
basis for our further considerations.We then review the background on link
layer protocols, surveyrelated work on the construction of flexible
protocol frameworks,and compare a range of actual link layer protocols and
algorithms.Based on the results of this analysis, we design, implement, and
evaluatethe FLL architecture and a selection of actual link layer
protocols.
We believe the findings of this dissertation add substantively to the
existing literature on link layer protocol design and are valuable for
theoreticians and experimentalists alike
Contributions to Improve Cognitive Strategies with Respect to Wireless Coexistence
Cognitive radio (CR) can identify temporarily available opportunities in a shared radio environment to improve spectral efficiency and coexistence behavior of radio systems. It operates as a secondary user (SU) and accommodates itself in detected opportunities with an intention to avoid harmful collisions with coexisting primary user (PU) systems. Such opportunistic operation of a CR system requires efficient situational awareness and reliable decision making for radio resource allocation.
Situational awareness includes sensing the environment followed by a hypothesis testing for detection of available opportunities in the coexisting environment. This process is often known as spectral hole
detection. Situational knowledge can be further enriched by forecasting the primary activities in the radio environment using predictive modeling based approaches. Improved knowledge about the coexisting
environment essentially means better decision making for secondary resource allocation. This dissertation identifies limitations of existing predictive modeling and spectral hole detection based resource allocation strategies and suggest improvements.
Firstly, accurate and efficient estimation of statistical parameters of the radio environment is identified as a fundamental challenge to realize predictive modeling based cognitive approaches. Lots of useful
training data which are essential to learn the system parameters are not available either because of environmental effects such as noise, interference and fading or because of limited system resources
particularly sensor bandwidth. While handling environmental effects to improve signal reception in radio systems has already gained much attention, this dissertation addresses the problem of data losses caused
by limited sensor bandwidth as it is totally ignored so far and presents bandwidth independent parameter estimation methods. Where, bandwidth independent means achieving the same level of estimation
accuracy for any sensor bandwidth.
Secondly, this dissertation argues that the existing hole detection strategies are dumb because they provide very little information about the coexisting environment. Decision making for resource allocation
based on this dumb hole detection approach cannot optimally exploit the opportunities available in the coexisting environment. As a solution, an intelligent hole detection scheme is proposed which suggests
classifying the primary systems and using the documented knowledge of identified radio technologies to fully understand their coexistence behavior.
Finally, this dissertation presents a neuro-fuzzy signal classifier (NFSC) that uses bandwidth, operating frequency, pulse shape, hopping behavior and time behavior of signals as distinct features in order to
xii identify the PU signals in coexisting environments. This classifier provides the foundation for bandwidth independent parameter estimation and intelligent hole detection. MATLAB/Simulink based simulations are used to support the arguments throughout in this dissertation. A proof-of-concept demonstrator using microcontroller and hardware defined radio (HDR) based transceiver is also presented at the end.</p
Feasibility of a Cognitive Extension to Existing 802.11b Wireless Devices
Cognitive radio presents a means of altering the communication method of a wireless device based on channel conditions and the intended receiving device. However, the design of such a radio is very complicated as it must consider the possibility of multiple forms of modulation, differing transmit frequencies and symbol rates, and the accompany changes to other training procedures such as synchronization. This work proposes that in some cases a simpler, more cost-effective approach can be taken, that builds upon the architecture of existing wireless devices forming a new radio with cognitive capabilities. This approach allows the base device to perform all baseband and MAC-related functions with minimal or no negative effects due to the extension. As changes in modulation type are much more complex, the analysis in this work is restricted to systems wanting to intelligently alter their transmit frequency or power, such as the 802.22 standard. Because of the extensive investment that has already been made in 802.11 technology, 802.11b chipsets and APs are very inexpensive. Therefore a frequency conversion extension was designed and tested as the fixed architecture to enable signal conversion of an 802.11b signal. Cognitive functionalities could be added with little modification to the proposed design in this work.The overall goal of this work is to achieve throughput and packet loss results comparable to the base design at the converted frequency of approximately 1.7 GHz. The successful conversion with a fixed design proves the concept feasible, as the only additional requirement is to interface a cognitive subsystem with a configurable architecture employing the same design as the fixed architecture. The nodes under test were isolated in an anechoic chamber to prevent interference from nearby networks. A program called IxChariot is used to experimentally conduct network performance tests to confirm that the extended device operates nearly identically to a normal 802.11b radio. Tests were performed for one-hop and two-hop scenarios collecting throughput and packet loss statistics. A number of undesirable effects such as increased switching delay time are also examined as well as their impact on the MAC and physical layer of the base device. The results of testing established the feasibility of a cognitive extension with no perceivable throughput/packet loss degradation for reasonable switching delays. Analysis of poor switching delay performance and 802.11g is also presented to illustrate the additional design constraints these challenges present
Proceedings of the Second International Mobile Satellite Conference (IMSC 1990)
Presented here are the proceedings of the Second International Mobile Satellite Conference (IMSC), held June 17-20, 1990 in Ottawa, Canada. Topics covered include future mobile satellite communications concepts, aeronautical applications, modulation and coding, propagation and experimental systems, mobile terminal equipment, network architecture and control, regulatory and policy considerations, vehicle antennas, and speech compression
Future benefits and applications of intelligent on-board processing to VSAT services
The trends and roles of VSAT services in the year 2010 time frame are examined based on an overall network and service model for that period. An estimate of the VSAT traffic is then made and the service and general network requirements are identified. In order to accommodate these traffic needs, four satellite VSAT architectures based on the use of fixed or scanning multibeam antennas in conjunction with IF switching or onboard regeneration and baseband processing are suggested. The performance of each of these architectures is assessed and the key enabling technologies are identified