Modular Acquisition and Stimulation System for Timestamp-Driven Neuroscience Experiments

Dedicated systems are fundamental for neuroscience experimental protocols that require timing determinism and synchronous stimuli generation. We developed a data acquisition and stimuli generator system for neuroscience research, optimized for recording timestamps from up to 6 spiking neurons and entirely specified in a high-level Hardware Description Language (HDL). Despite the logic complexity penalty of synthesizing from such a language, it was possible to implement our design in a low-cost small reconfigurable device. Under a modular framework, we explored two different memory arbitration schemes for our system, evaluating both their logic element usage and resilience to input activity bursts. One of them was designed with a decoupled and latency insensitive approach, allowing for easier code reuse, while the other adopted a centralized scheme, constructed specifically for our application. The usage of a high-level HDL allowed straightforward and stepwise code modifications to transform one architecture into the other. The achieved modularity is very useful for rapidly prototyping novel electronic instrumentation systems tailored to scientific research.Comment: Preprint submitted to ARC 2015. Extended: 16 pages, 10 figures. The final publication is available at link.springer.co

Coarse-grained reconfigurable array architectures

Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefit from the high ILP support in VLIW architectures. By executing non-loop code on other cores, however, CGRAs can focus on such loops to execute them more efficiently. This chapter discusses the basic principles of CGRAs, and the wide range of design options available to a CGRA designer, covering a large number of existing CGRA designs. The impact of different options on flexibility, performance, and power-efficiency is discussed, as well as the need for compiler support. The ADRES CGRA design template is studied in more detail as a use case to illustrate the need for design space exploration, for compiler support and for the manual fine-tuning of source code

Fault Secure Encoder and Decoder for NanoMemory Applications

Memory cells have been protected from soft errors for more than a decade; due to the increase in soft error rate in logic circuits, the encoder and decoder circuitry around the memory blocks have become susceptible to soft errors as well and must also be protected. We introduce a new approach to design fault-secure encoder and decoder circuitry for memory designs. The key novel contribution of this paper is identifying and defining a new class of error-correcting codes whose redundancy makes the design of fault-secure detectors (FSD) particularly simple. We further quantify the importance of protecting encoder and decoder circuitry against transient errors, illustrating a scenario where the system failure rate (FIT) is dominated by the failure rate of the encoder and decoder. We prove that Euclidean geometry low-density parity-check (EG-LDPC) codes have the fault-secure detector capability. Using some of the smaller EG-LDPC codes, we can tolerate bit or nanowire defect rates of 10% and fault rates of 10^(-18) upsets/device/cycle, achieving a FIT rate at or below one for the entire memory system and a memory density of 10^(11) bit/cm^2 with nanowire pitch of 10 nm for memory blocks of 10 Mb or larger. Larger EG-LDPC codes can achieve even higher reliability and lower area overhead

Load dispatch optimization of open cycle industrial gas turbine plant incorporating operational, maintenance and environmental parameters

Power generation fuel cost, unit availability and environmental rules and regulations are important parameters in power generation load dispatch optimization. Previous optimization work has not considered the later two in their formulations. The objective of this work is to develop a multi-objective optimization model and optimization algorithm for load dispatching optimization of open cycle gas turbine plant that not only consider operational parameters, but also incorporates maintenance and environmental parameters. Gas turbine performance parameters with reference to ASME PTC 22-1985 were developed and validated against an installed performance monitoring system (PMS9000) and plant performance test report. A gas turbine input-output model and emission were defined mathematically into the optimization multi-objectives function. Maintenance parameters of Equivalent Operating Hours (EOH) constraints and environmental parameters of allowable emission (NOx, CO and SO2) limits constraints were also included. The Extended Priority List and Particle Swarm Optimization (EPL-PSO) method was successfully implemented to solve the model. Four simulation tests were conducted to study and test the develop optimization software. Simulation results successfully demonstrated that multi-objectives total production cost (TPC) objective functions, the proposed EOH constraint, emissions model and constraints algorithm could be incorporated into the EPL-PSO method which provided optimum results, without violating any of the constraints as defined. A cost saving of 0.685% and 0.1157% could be obtained based on simulations conducted on actual plant condition and against benchmark problem respectively. The results of this work can be used for actual plant application and future development work for new gas turbine model or to include additional operational constraint