1,736 research outputs found

    The Flight Telerobotic Servicer (FTS) NASA's first operational robotic system

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    NASA has completed the preliminary definition phase of the Flight Telerobotic Servicer (FTS) and is now preparing to begin the detailed design and fabrication phase. The FTS will be designed and built by Martin Marietta Astronautics Group in Denver, CO, for the Goddard Space Flight Center, in support of the Space Station Freedom Program. The design concepts for the FTS are discussed, as well as operational scenarios for the assembly, maintenance, servicing and inspection tasks which are being considered for the FTS. The upcoming Development Test Flight (DTF-1) is the first of two shuttle test flights to test FTS operations in the environment of space and to demonstrate the FTS capabilities in performing tasks for Space Station Freedom. Operational planning for DTF-1 is discussed as well as development plans for the operational support of the FTS on the space station

    Quiescent current testing of CMOS data converters

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    Power supply quiescent current (IDDQ) testing has been very effective in VLSI circuits designed in CMOS processes detecting physical defects such as open and shorts and bridging defects. However, in sub-micron VLSI circuits, IDDQ is masked by the increased subthreshold (leakage) current of MOSFETs affecting the efficiency of I¬DDQ testing. In this work, an attempt has been made to perform robust IDDQ testing in presence of increased leakage current by suitably modifying some of the test methods normally used in industry. Digital CMOS integrated circuits have been tested successfully using IDDQ and IDDQ methods for physical defects. However, testing of analog circuits is still a problem due to variation in design from one specific application to other. The increased leakage current further complicates not only the design but also testing. Mixed-signal integrated circuits such as the data converters are even more difficult to test because both analog and digital functions are built on the same substrate. We have re-examined both IDDQ and IDDQ methods of testing digital CMOS VLSI circuits and added features to minimize the influence of leakage current. We have designed built-in current sensors (BICS) for on-chip testing of analog and mixed-signal integrated circuits. We have also combined quiescent current testing with oscillation and transient current test techniques to map large number of manufacturing defects on a chip. In testing, we have used a simple method of injecting faults simulating manufacturing defects invented in our VLSI research group. We present design and testing of analog and mixed-signal integrated circuits with on-chip BICS such as an operational amplifier, 12-bit charge scaling architecture based digital-to-analog converter (DAC), 12-bit recycling architecture based analog-to-digital converter (ADC) and operational amplifier with floating gate inputs. The designed circuits are fabricated in 0.5 μm and 1.5 μm n-well CMOS processes and tested. Experimentally observed results of the fabricated devices are compared with simulations from SPICE using MOS level 3 and BSIM3.1 model parameters for 1.5 μm and 0.5 μm n-well CMOS technologies, respectively. We have also explored the possibility of using noise in VLSI circuits for testing defects and present the method we have developed

    Index to NASA Tech Briefs, 1975

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    This index contains abstracts and four indexes--subject, personal author, originating Center, and Tech Brief number--for 1975 Tech Briefs

    Development of an image converter of radical design

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    A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product

    Multilevel Simulation Methodology for FMECA Study Applied to a Complex Cyber-Physical System

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    Complex systems are composed of numerous interconnected subsystems, each designed to perform specific functions. The different subsystems use many technological items that work together, as for the case of cyber-physical systems. Typically, a cyber-physical system is composed of different mechanical actuators driven by electrical power devices and monitored by sensors. Several approaches are available for designing and validating complex systems, and among them, behavioral-level modeling is becoming one of the most popular. When such cyber-physical systems are employed in mission- or safety-critical applications, it is mandatory to understand the impacts of faults on them and how failures in subsystems can propagate through the overall system. In this paper, we propose a methodology for supporting the failure mode, effects, and criticality analysis (FMECA) aimed at identifying the critical faults and assessing their effects on the overall system. The end goal is to analyze how a fault affecting a single subsystem possibly propagates through the whole cyber-physical system, considering also the embedded software and the mechanical elements. In particular, our approach allows the analysis of the propagation through the whole system (working at high level) of a fault injected at low level. This paper provides a solution to automate the FMECA process (until now mainly performed manually) for complex cyber-physical systems. It improves the failure classification effectiveness: considering our test case, it reduced the number of critical faults from 10 to 6. The remaining four faults are mitigated by the cyber-physical system architecture. The proposed approach has been tested on a real cyber-physical system in charge of driving a three-phase motor for industrial compressors, showing its feasibility and effectiveness

    Electronic/electric technology benefits study

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    The benefits and payoffs of advanced electronic/electric technologies were investigated for three types of aircraft. The technologies, evaluated in each of the three airplanes, included advanced flight controls, advanced secondary power, advanced avionic complements, new cockpit displays, and advanced air traffic control techniques. For the advanced flight controls, the near term considered relaxed static stability (RSS) with mechanical backup. The far term considered an advanced fly by wire system for a longitudinally unstable airplane. In the case of the secondary power systems, trades were made in two steps: in the near term, engine bleed was eliminated; in the far term bleed air, air plus hydraulics were eliminated. Using three commercial aircraft, in the 150, 350, and 700 passenger range, the technology value and pay-offs were quantified, with emphasis on the fiscal benefits. Weight reductions deriving from fuel saving and other system improvements were identified and the weight savings were cycled for their impact on TOGW (takeoff gross weight) and upon the performance of the airframes/engines. Maintenance, reliability, and logistic support were the other criteria

    A survey of design techniques for system-level dynamic power management

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    Real Time Testing and Validation of a Novel Short Circuit Current (SCC) Controller for a Photovoltaic Inverter

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    About 45% applications from PV solar farm developers seeking connections to the distribution grids in Ontario were denied in 2011-13 as the short circuit current (SCC) capacity of several distribution substations had already been reached. PV solar system inverters typically contribute 1.2 p.u. to 1.8 p.u. fault current which was not considered acceptable by utility companies due to the need for very expensive protective breaker upgrades. Since then, this cause has become a major impediment in the growth of PV based renewable systems in Ontario. A novel predictive technique has been patented in our research group for management of short circuit current contribution from PV inverters to ensure effective deployment of solar farms. This thesis deals with the real time testing and validation of a short circuit current (SCC) controller based on the above technique. With this SCC controller, the PV inverter can be shut off within 1-2 milliseconds from the initiation of any fault in the grid that can cause the short circuit current to exceed the rated current of the inverter. Therefore, the power system does not see any short circuit current contribution from the PV inverter and no expensive upgrades in protective breakers are required in the system. The performance of the PV solar system with the short circuit current controller is simulated and tested using (i) industry grade electromagnetic transients software PSCAD/EMTDC (ii) real time simulation studies on the Real Time Digital Simulator (RTDS) (iii) physical implementation on dSPACE board to generate firing pulses for the inverter. The validation of controller is done on dSPACE board with actual PV inverter short circuit waveforms obtained from Southern California Edison Short Circuit Testing Lab. This novel technology is planned to be showcased on a physical 10 kW PV solar system in Bluewater Power Distribution Corporation, Sarnia, Ontario. This proposed technology is expected to remove the technical hurdles which caused the denials of connectivity to several PV solar farms, and effectively lead to greater connections of PV solar farms in Ontario and in similar jurisdictions, worldwide
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