EVEREST IST - 2002 - 00185 : D23 : final report

Deliverable públic del projecte europeu EVERESTThis deliverable constitutes the final report of the project IST-2002-001858 EVEREST. After its successful completion, the project presents this document that firstly summarizes the context, goal and the approach objective of the project. Then it presents a concise summary of the major goals and results, as well as highlights the most valuable lessons derived form the project work. A list of deliverables and publications is included in the annex.Postprint (published version

Quantum Key Distribution (QKD) over Software-Defined Optical Networks

Optical network security is attracting increasing research interest. Currently, software-defined optical network (SDON) has been proposed to increase network intelligence (e.g., flexibility and programmability) which is gradually moving toward industrialization. However, a variety of new threats are emerging in SDONs. Data encryption is an effective way to secure communications in SDONs. However, classical key distribution methods based on the mathematical complexity will suffer from increasing computational power and attack algorithms in the near future. Noticeably, quantum key distribution (QKD) is now being considered as a secure mechanism to provision information-theoretically secure secret keys for data encryption, which is a potential technique to protect communications from security attacks in SDONs. This chapter introduces the basic principles and enabling technologies of QKD. Based on the QKD enabling technologies, an architecture of QKD over SDONs is presented. Resource allocation problem is elaborated in detail and is classified into wavelength allocation, time-slot allocation, and secret key allocation problems in QKD over SDONs. Some open issues and challenges such as survivability, cost optimization, and key on demand (KoD) for QKD over SDONs are discussed

Extremely low frequency based communication link

The paper discusses the literature review and the possibility of using the ground itself as transmission medium for various users’ transceivers and an administrator transceiver using Multi-Carrier-Direct Sequence-Code Division Multiple Access (MC-DS-CDMA), Orthogonal Frequency Division Multiplexing (OFDM),16-Quadrature Amplitude Modulation (16-QAM), Frequency Division Duplex (FDD) and Extremely Low Frequency (ELF) band for the applications of Oil Well Telemetry, remote control of power substations or any system that its responding time is not critical

Indoor Positioning with GNSS-Like Local Signal Transmitters

Not all the techniques proposed have, of course, been based on radio techniques, but they are the most important ones for two main reasons: their level of development and maturity on the one hand and their ability to "cross" or to "get around" obstacles such as walls, furniture or people on the other hand. Optical based techniques, like laser based distance measurements or vision based (camera) scene analysis systems present some real advantages in terms of measurement accuracy (a few millimetres for the former) or orientation determination (very useful for any guidance system, available for the latter). Unfortunately, the foreseen use of positioning devices being mainly dedicated to pedestrians in urban environments, optical obstacles are numerous. These latter techniques are then considered as potential hybridisation candidates. Many types of sensors have also been studied for positioning, such as infrared or ultrasound. Once again, although accuracy can reach centimetre values, the environmental constraints are not compatible with the ubiquitous systems being sought. Another category is, of course, inertial systems which could be a valuable alternative to radio systems: time and distance associated position drifts are not yet sufficiently mastered and the given positioning is relative , which means the need for "something else" in order to provide the user with an absolute location. The object of this section is to focus on radio based approaches

The effect of interconnect design on the performance of large L2 caches

Journal ArticleThe ever increasing sizes of on-chip caches and the growing domination of wire delay have changed the traditional design approach of the memory hierarchy. Many recent proposals advocate splitting the cache into a large number of banks and employ an on-chip network to allow fast access to nearby banks (referred to as Non-Uniform Cache Architectures (NUCA)). While these proposals focus on optimizing logical policies (placement, searching, and movement) associated with a cache design, initial design choices do not include the complexity of the network. With wire delay being the major performance limiting factor in modern processors, components designed without including wire parameters and network overhead will be sub-optimal with respect to both delay and power. The primary contributions of this work are: 1. An extension of the current version of CACTI to include network overhead and find the optimal design point for large on-chip caches. 2. An evaluation of novel techniques at the microarchitecture level that exploit special wires in the L2 cache network to improve performance

Interconnect-aware coherence protocols for chip multiprocessors

Journal ArticleImprovements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future billion transistor architectures due to their low design complexity, high clock frequency, and high throughput. In a typical CMP architecture, the L2 cache is shared by multiple cores and data coherence is maintained among private L1s. Coherence operations entail frequent communication over global on-chip wires. In future technologies, communication between different L1s will have a significant impact on overall processor performance and power consumption. On-chip wires can be designed to have different latency, bandwidth, and energy properties. Likewise, coherence protocol messages have different latency and bandwidth needs. We propose an interconnect composed of wires with varying latency, bandwidth, and energy characteristics, and advocate intelligently mapping coherence operations to the appropriate wires. In this paper, we present a comprehensive list of techniques that allow coherence protocols to exploit a heterogeneous interconnect and evaluate a subset of these techniques to show their performance and power-efficiency potential. Most of the proposed techniques can be implemented with a minimum complexity overhead

Microarchitectural wire management for performance and power in partitioned architectures

Journal ArticleFuture high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low power. In such architectures, inter-partition communication over global wires has a significant impact on overall processor performance and power consumption. VLSI techniques allow a variety of wire implementations, but these wire properties have previously never been exposed to the microarchitecture. This paper advocates global wire management at the microarchitecture level and proposes a heterogeneous interconnect that is comprised of wires with varying latency, bandwidth, and energy characteristics. We propose and evaluate microarchitectural techniques that can exploit such a heterogeneous interconnect to improve performance and reduce energy consumption. These techniques include a novel cache pipeline design, the identification of narrow bit-width operands, the classification of non-critical data, and the detection of interconnect load imbalance. For a dynamically scheduled partitioned architecture, our results demonstrate that the proposed innovations result in up to 11% reductions in overall processor ED2, compared to a baseline processor that employs a homogeneous interconnect