439 research outputs found

    High Efficiency Power Amplifier Based on Envelope Elimination and Restoration Technique

    Get PDF
    Due to complex envelope and phase modulation employed in modern transmitters it is necessary to use power amplifiers that have high linearity. Linear power amplifiers (classes A, B and AB) are commonly used, but they suffer from low efficiency especially if the transmitted signal has high peak to average power ratio (PAPR). Kahn's technique based on envelope elimination and restoration (EER) is based on idea that high efficiency power supply (envelope amplifier) could be used to modulate the envelope of high efficient non linear power amplifiers (classes D or E). This paper presents solutions for power amplifier that performs envelope modulation and class E amplifier that is used as a non linear amplifier. The envelope amplifier is implemented as a multilevel converter in series with linear regulator and can provide up to 100 W of instantaneous power and reproduce 2 MHz sine wave. The implemented Class E amplifier can operate at 120 MHz with efficiency near to 85%. The envelope amplifier and class E amplifier have been integrated and efficiency and linearity of the implemented transmitter has been measured and presente

    Increasing the talk-time of mobile radios with efficient linear transmitter architectures

    Get PDF

    Comparison of Two Multilevel Architectures for Envelope Amplifier

    Get PDF
    Modern transmitters usually have to amplify and transmit signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has low peak-to-average power ratio. The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper compares two solutions for the envelope amplifier based on a combination of multilevel converter and linear regulator. The solutions are compared regarding their efficiency, size and weight. Both solutions can reproduce any signal with maximal spectral component of 1 MHz and give instantaneous maximal power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, the implemented prototypes have up to 19% higher efficiency than linear regulator that is used as a conventional solution

    Multilevel Power Supply for High Efficiency RF Amplifiers

    Get PDF
    In radio systems linear power amplifiers (class A, B or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has low peak-to-average power ratio. The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper presents a solution for the envelope amplifier based on a combination of multilevel converter and linear regulator. The proposed solution can reproduce any signal with maximal spectral component of 2 MHz and give instantaneous maximal power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, it has up to 15% higher efficiency than linear regulator that is used as a conventional solution. Additionally, the algorithm for selection of voltage levels for the multilevel converter is explained, as well

    CMOS Integrated Switched-Mode Transmitters for Wireless Communication

    Get PDF

    Energy Efficient RF Transmitter Design using Enhanced Breakdown Voltage SOI-CMOS Compatible MESFETs

    Get PDF
    abstract: The high cut-off frequency of deep sub-micron CMOS technologies has enabled the integration of radio frequency (RF) transceivers with digital circuits. However, the challenging point is the integration of RF power amplifiers, mainly due to the low breakdown voltage of CMOS transistors. Silicon-on-insulator (SOI) metal semiconductor field effect transistors (MESFETs) have been introduced to remedy the limited headroom concern in CMOS technologies. The MESFETs presented in this thesis have been fabricated on different SOI-CMOS processes without making any change to the standard fabrication steps and offer 2-30 times higher breakdown voltage than the MOSFETs on the same process. This thesis explains the design steps of high efficiency and wideband RF transmitters using the proposed SOI-CMOS compatible MESFETs. This task involves DC and RF characterization of MESFET devices, along with providing a compact Spice model for simulation purposes. This thesis presents the design of several SOI-MESFET RF power amplifiers operating at 433, 900 and 1800 MHz with ~40% bandwidth. Measurement results show a peak power added efficiency (PAE) of 55% and a peak output power of 22.5 dBm. The RF-PAs were designed to operate in Class-AB mode to minimize the linearity degradation. Class-AB power amplifiers lead to poor power added efficiency, especially when fed with signals with high peak to average power ratio (PAPR) such as wideband code division multiple access (W-CDMA). Polar transmitters have been introduced to improve the efficiency of RF-PAs at backed-off powers. A MESFET based envelope tracking (ET) polar transmitter was designed and measured. A low drop-out voltage regulator (LDO) was used as the supply modulator of this polar transmitter. MESFETs are depletion mode devices; therefore, they can be configured in a source follower configuration to have better stability and higher bandwidth that MOSFET based LDOs. Measurement results show 350 MHz bandwidth while driving a 10 pF capacitive load. A novel polar transmitter is introduced in this thesis to alleviate some of the limitations associated with polar transmitters. The proposed architecture uses the backgate terminal of a partially depleted transistor on SOI process, which relaxes the bandwidth and efficiency requirements of the envelope amplifier in a polar transmitter. The measurement results of the proposed transmitter demonstrate more than three times PAE improvement at 6-dB backed-off output power, compared to the traditional RF transmitters.Dissertation/ThesisPh.D. Electrical Engineering 201

    Envelope Amplifier for RF Amplifier based on Multilevel Converter

    Get PDF
    Modern transmitters usually have to amplify and transmit signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has low peakto-average power ratio. The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifierThis paper presents a solution for the envelope amplifier based on a combination of multilevel converter and linear regulator. The proposed solution can reproduce any signal with maximal spectral component of 2 MHz and give instantaneous maximal power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, it has up to 15% higher efficiency than linear regulator that is used as a conventional solution. Additionally, the algorithm for selection of voltage levels for the multilevel converter is explained, as wel

    A flexible test-bed for developing hybrid linear transmitter architectures

    Get PDF

    Doctor of Philosophy

    Get PDF
    dissertationHigh speed wireless communication systems (e.g., long-term evolution (LTE), Wi-Fi) operate with high bandwidth and large peak-to-average power ratios (PAPRs). This is largely due to the use of orthogonal frequency division multiplexing (OFDM) modulation that is prevalent to maximize the spectral efficiency of the communication system. The power amplifier (PA) in the transmitter is the dominant energy consumer in the radio, largely because of the PAPR of the input signal. To reduce the energy consumption of the PA an amplifier that simultaneously achieves high efficiency and high linearity. Furthermore, to lower the cost for high volume production, it is desirable to achieve a complete System-on-Chip (SoC) integration. Linear amplifiers (e.g., Class-A, -B, -AB) are inefficient when amplifying signals with large PAPR that is associated by high peak-to-average modulation techniques such as LTE. OFDM. Switching amplifiers (e.g., Class-D, -E, -F) are very promising due to their high efficiency when compared to their linear amplifier counterparts. Linearization techniques for switching amplifiers have been intensively investigated due to their limited sensitivity to the input amplitude of the signal. Deep-submicron CMOS technology is mostly utilized for logic circuitry, and the Moore's law scaling of CMOS optimizes transistors to operate as high-speed and low-loss switches rather than high gain transistors. Hence, it is advantageous to use transistors in switching mode as switching amplifies and use high-speed digital logic circuitry to implement linearization systems and circuitry. In this work, several linearization architectures are investigated and demonstrated. An envelope elimination and restoration (EER) transmitter that comprises a class-E power amplifier and a 10-bit digital-to-analog converter (DAC) controlled current modulator is investigated. A pipelined switched-capacitor DAC is designed to control an open-loop transconductor that operates as a current modulator, modulating the amplitude of the current supplied to a class-E PA. Such a topology allows for increased filtering of the quantization noise that is problematic in most digital PAs (DPA). The proposed quadrature and multiphase architecture can avoid the bandwidth expansion and delay mismatch associated with polar PAs. The multiphase switched capacitor power amplifier (SCPA) was proposed after the quadrature SCPA and it significantly improves the power efficiency
    • …
    corecore