Permutation and sampling with maximum length CA for pseudorandom number generation

In this paper, we study the effect of dynamic permutation and sampling on the randomness quality of sequences generated by cellular automata (CA). Dynamic permutation and sampling have not been explored in previous CA work and a suitable implementation is shown using a two CA model. Three different schemes that incorporate these two operations are suggested - Weighted Permutation Vector Sampling with Controlled Multiplexing, Weighted Permutation Vector Sampling with Irregular Decimation and Permutation Programmed CA Sampling. The experiment results show that the resulting sequences have varying degrees of improvement in DIEHARD results and linear complexity compared to the CA

Pseudorandom number generation based on controllable cellular automata

A novel Cellular Automata (CA) Controllable CA (CCA) is proposed in this paper. Further, CCA are applied in Pseudorandom Number Generation. Randomness test results on CCA Pseudorandom Number Generators (PRNGs) show that they are better than 1-d CA PRNGs and can be comparable to 2-d ones. But they do not lose the structure simplicity of 1-d CA. Further, we develop several different types of CCA PRNGs. Based on the comparison of the randomness of different CCA PRNGs, we find that their properties are decided by the actions of the controllable cells and their neighbors. These novel CCA may be applied in other applications where structure non-uniformity or asymmetry is desired

AFSM-based deterministic hardware TPG

This paper proposes a new approach for designing a cost-effective, on-chip, hardware pattern generator of deterministic test sequences. Given a pre-computed test pattern (obtained by an ATPG tool) with predetermined fault coverage, a hardware Test Pattern Generator (TPG) based on Autonomous Finite State Machines (AFSM) structure is synthesized to generate it. This new approach exploits "don't care" bits of the deterministic test patterns to lower area overhead of the TPG. Simulations using benchmark circuits show that the hardware components cost is considerably less when compared with alternative solution

A Family of Controllable Cellular Automata for Pseudorandom Number Generation

In this paper, we present a family of novel Pseudorandom Number Generators (PRNGs) based on Controllable Cellular Automata (CCA) ─ CCA0, CCA1, CCA2 (NCA), CCA3 (BCA), CCA4 (asymmetric NCA), CCA5, CCA6 and CCA7 PRNGs. The ENT and DIEHARD test suites are used to evaluate the randomness of these CCA PRNGs. The results show that their randomness is better than that of conventional CA and PCA PRNGs while they do not lose the structure simplicity of 1-d CA. Moreover, their randomness can be comparable to that of 2-d CA PRNGs. Furthermore, we integrate six different types of CCA PRNGs to form CCA PRNG groups to see if the randomness quality of such groups could exceed that of any individual CCA PRNG. Genetic Algorithm (GA) is used to evolve the configuration of the CCA PRNG groups. Randomness test results on the evolved CCA PRNG groups show that the randomness of the evolved groups is further improved compared with any individual CCA PRNG

On the design of stream ciphers with Cellular Automata having radius = 2

Cellular Automata (CA) have recently evolved as a good cryptographic primitive. It plays an important role in the construction of new fast, efficient and secure stream ciphers. Several studies have been made on CA based stream ciphers and we observe that the cryptographic strength of a CA based stream cipher increases with the increase in the neighbourhood radii if appropriate CA rules are employed. The current work explores the cryptographic feasibility of 5-neighbourhood CA rules also referred to as pentavalent rules. A new CA based stream cipher, CARPenter, which uses pentavalent rules have been proposed. The cipher incorporates maximum length null-boundary linear CA and a non-linear CA along with a good non-linear mixing function. This is implemented in hardware as well as software and exhibits good cryptographic properties which makes the cipher resistant to almost all attacks on stream ciphers, but with the cost of additional computing requirements. This cipher uses 16 cycles for initialization, which is the least number of cycles when compared to other existing stream ciphers

Power Droop Reduction In Logic BIST By Scan Chain Reordering

Significant peak power (PP), thus power droop (PD), during test is a serious concern for modern, complex ICs. In fact, the PD originated during the application of test vectors may produce a delay effect on the circuit under test signal transitions. This event may be erroneously recognized as presence of a delay fault, with consequent generation of an erroneous test fail, thus increasing yield loss. Several solutions have been proposed in the literature to reduce the PD during test of combinational ICs, while fewer approaches exist for sequential ICs. In this paper, we propose a novel approach to reduce peak power/power droop during test of sequential circuits with scan-based Logic BIST. In particular, our approach reduces the switching activity of the scan chains between following capture cycles. This is achieved by an original generation and arrangement of test vectors. The proposed approach presents a very low impact on fault coverage and test time