When the path is never shortest: a reality check on shortest path biocomputation

Shortest path problems are a touchstone for evaluating the computing performance and functional range of novel computing substrates. Much has been published in recent years regarding the use of biocomputers to solve minimal path problems such as route optimisation and labyrinth navigation, but their outputs are typically difficult to reproduce and somewhat abstract in nature, suggesting that both experimental design and analysis in the field require standardising. This chapter details laboratory experimental data which probe the path finding process in two single-celled protistic model organisms, Physarum polycephalum and Paramecium caudatum, comprising a shortest path problem and labyrinth navigation, respectively. The results presented illustrate several of the key difficulties that are encountered in categorising biological behaviours in the language of computing, including biological variability, non-halting operations and adverse reactions to experimental stimuli. It is concluded that neither organism examined are able to efficiently or reproducibly solve shortest path problems in the specific experimental conditions that were tested. Data presented are contextualised with biological theory and design principles for maximising the usefulness of experimental biocomputer prototypes.Comment: To appear in: Adamatzky, A (Ed.) Shortest path solvers. From software to wetware. Springer, 201

A COMPREHENSIVE AND COMPARATIVE STUDY OF DFS, BFS, AND A* SEARCH ALGORITHMS IN A SOLVING THE MAZE TRANSVERSAL PROBLEM

A search algorithm addresses the challenge of determining the shortest path from the start to the goal while avoiding all possible obstacles. In the quest to design realistic Artificial Intelligence in gaming, we use these algorithms to determine the movement of the agents. The search algorithms for finding the shortest path were implemented using a Maze transversal problem. An agent/player in a maze transversal problem needs a search algorithm to get to its destination and in the least time possible. This algorithm assists an agent/player to travel from the start node to the goal node. The implementation of inappropriate algorithms can alter the length of the computer process for determining the shortest path and the agent/player will have to wait longer as the execution process will take more time. In the Maze transversal problem, pathfinding algorithms, Depth first Search (DFS), Breadth First Search (BFS) and A star (A*) were used for the comparison. The comparison procedure was carried out by running the different algorithms in three (3) mazes with the same dimensions but different obstacles and monitoring the execution time and path length. The findings of this study suggest that the A* search algorithm should be used in the Maze transversal problem as it finds the shortest path to the goal in the shortest possible time and length

Memristive Grid for Maze Solving

Memcomputing represents a novel form of neuro-oriented signal processing that uses the memristor as a key element. In this chapter, a memristive grid is developed in order to achieve the specific task of solving mazes. This is done by resorting to the dynamic behavior of the memristance in order to find the shortest path that determines trajectory from entrance to exit. The structure of the maze is mapped onto the memristive grid, which is formed by memristors that are defined by fully analytical charge-controlled functions. The dependance on the electric charge permits to analyze the variation of the branch memristance of the grid as a function of time. As a result of the dynamic behavior of the developed memristor model, the shortest path is formed by those memristive branches exhibiting the fastest memristance change. Special attention is given to achieve a realistic implementation of the fuses of the grid, which are formed by an anti-series connection of memristors and CMOS circuitry. HSPICE is used in combination with MATLAB to establish the simulation flow of the memristive grid. Besides, the memristor model is recast in VERILOG-A, a high-level hardware description language for analog circuits