Hall Effect Gyrators and Circulators

The electronic circulator, and its close relative the gyrator, are invaluable tools for noise management and signal routing in the current generation of low-temperature microwave systems for the implementation of new quantum technologies. The current implementation of these devices using the Faraday effect is satisfactory, but requires a bulky structure whose physical dimension is close to the microwave wavelength employed. The Hall effect is an alternative non-reciprocal effect that can also be used to produce desired device functionality. We review earlier efforts to use an ohmically-contacted four-terminal Hall bar, explaining why this approach leads to unacceptably high device loss. We find that capacitive coupling to such a Hall conductor has much greater promise for achieving good circulator and gyrator functionality. We formulate a classical Ohm-Hall analysis for calculating the properties of such a device, and show how this classical theory simplifies remarkably in the limiting case of the Hall angle approaching 90 degrees. In this limit we find that either a four-terminal or a three-terminal capacitive device can give excellent circulator behavior, with device dimensions far smaller than the a.c. wavelength. An experiment is proposed to achieve GHz-band gyration in millimetre (and smaller) scale structures employing either semiconductor heterostructure or graphene Hall conductors. An inductively coupled scheme for realising a Hall gyrator is also analysed.Comment: 18 pages, 15 figures, ~5 MB. V3: sections V-VIII revisited plus other minor changes, Fig 2 added. Submitted to PR

Optical isolation by temporal modulation: size, frequency, and power constraints

Optical isolators are indispensable components of optical networks. Magneto-optic isolators have excellent operating characteristics, including low-to-no power consumption, but are not well suited for on-chip integration. The technique of temporal modulation of dielectric constant offers an alternative way to achieve isolation without magnetic field but is not without its own drawbacks. In this work I examine diverse methods of optical isolation via temporal modulation and show that independent on whether modulation is achieved by carrier injection, Pockels and acousto-optic effects, or any other conceivable method, there is essentially the same set of constraints on footprint, modulation frequency, and, most important, on power consumption required to achieve full isolation without excessive insertion loss. This power is estimated to be on the order of at least a hundred of milliwatts and whether this requirement is acceptable will depend on ongoing progress of both magneto-optic and time modulated integrated technologies

Adaptive Impedance Tuning Network using Genetic Algorithm: ITuneGA

Adaptive impedance tuning algorithms are used to preserve the link quality of mobile phones under fluctuating user conditions. It is highly desirable to correct the complex impedance mismatch with high convergence rate. Presented here, is a novel technique for correcting impedance mismatch in adaptive impedance tuning network by exploiting the relationships among the genetic algorithm’s coefficient values derived from the matching network parameters. Simulation results demonstrate that the proposed impedance tunable algorithm (ITuneGA) outperforms conventional GA and LMS, with its fast convergence speed and high accuracy. The robustness of ITuneGA has been verified by using Pi-networks with two and four tuning elements. ITuneGA corrects antenna impedance mismatches and reduces the reflected power, thereby significantly improving the quality of the signal

Amplificadores de potência para radiofrequência insensíveis à impedância de carga

Solid state power amplifiers (SSPAs) evolved significantly over the last few decades, mainly, due to the use of new transistor technologies, such as gallium nitride (GaN) high-electron-mobility transistors (HEMTs), very advanced computer-aided design (CAD) software, and very effective digital pre-distortion (DPD) algorithms. This led to a considerable performance improvement, in terms of energy efficiency, output power, and linearity. To achieve this performance, power amplifier (PA) designers normally push the used transistors very close to their physical safe operating limits, and consider them to operate for a fixed output load. However, the designed PAs are used for many different industrial and/or telecommunication applications, and, in some cases, such as, for example, microwave cooking or massive multiple-input multiple-output (MIMO) fifth generation (5G) base stations (BSs), the output load of these amplifiers can change. Under this nonoptimal scenario, the used transistors will operate for non-nominal loads, and the PAs performance can be severely degraded. Moreover, in highly optimized designs, where the transistors are operated close to their safe limits, their reliability can be reduced or, in extreme cases, they can even be permanently damaged. Therefore, load insensitive PA architectures, and/or techniques that aim at reducing the load variation seen by the PA, are necessary to improve the performance under load varying scenarios. This thesis presents various strategies to improve load insensitiveness of PAs. The presented techniques are based on tunable matching networks (TMNs) and on the amplifiers’ drain supply voltage (VDS) variation. The developed TMNs successfully reduced the load variation seen by the PA, and its performance was greatly improved, for non-optimal loading, by also using the derived load dependent VDS variation. These different approaches were tested and validated on single-ended PAs and then, based on their advantages and disadvantages, the most promising technique – the supply voltage modulation – was selected for the design of a Doherty power amplifier (DPA), which is of paramount importance for telecommunication applications. Moreover, since in some applications the output load variation can be unpredictable, we also developed a complete quasi-load insensitive (QLI) PA system that includes an impedance tracking circuit and an automatic real-time compensation of the amplifier performance.Os amplificadores de potência de estado sólido (SSPAs) evoluíram significativamente nas últimas décadas, principalmente devido à utilização de novas tecnologias de transístores, como os transístores de alta mobilidade (HEMTs) de nitreto de gálio (GaN), de ferramentas muito avançadas de projeto assistido por computador (CAD) e de algoritmos de pré-distorção digital (DPD) muito evoluídos. Isto levou a uma melhoria de desempenho considerável, em termos de eficiência energética, potência de saída e linearidade. Normalmente, para obter estes níveis de desempenho, os engenheiros projetam os amplificadores permitindo que os transístores utilizados operem muito perto do seu limite físico de funcionamento seguro e considerando que vão operar para uma carga fixa. No entanto, os amplificadores projetados são utilizados em diversas aplicações industriais e/ou telecomunicações e, em alguns casos, como por exemplo fornos micro-ondas ou estações base 5G, a sua carga de saída pode variar devido a várias causas, que podem ser previsíveis ou imprevisíveis. Neste cenário não ideal, os transístores utilizados operam para cargas não ótimas e o desempenho dos amplificadores pode ser muito degradado. Além disso, em projetos muito otimizados, onde os transístores são operados perto do seu limite de funcionamento seguro, a sua durabilidade pode ser reduzida ou, em casos extremos, podem até ser permanentemente danificados. Portanto, para melhorar o desempenho dos amplificadores em cenários de carga variável, são necessárias novas arquiteturas e/ou técnicas que visam reduzir a variação da carga vista pelos transístores utilizados. Esta tese apresenta várias estratégias para melhorar a insensibilidade dos amplificadores em relação à variação de carga. As técnicas apresentadas são baseadas em malhas de adaptação dinâmicas (TMNs) e na variação da tensão de alimentação dos amplificadores. As malhas de adaptação desenvolvidas permitiram reduzir a variação de carga vista pelo amplificador e a variação da sua tensão de alimentação permitiu melhorar o desempenho para operação com cargas não ótimas. Estas abordagens foram testadas e validadas em amplificadores baseados num só transístor, e, posteriormente, com base nas suas vantagens e desvantagens, a técnica mais promissora – a modulação da tensão de alimentação – foi selecionada para o projeto de um amplificador Doherty, que é imprescindível para telecomunicações. Além disso, como em algumas aplicações a variação da carga de saída pode ser imprevisível, também desenvolvemos um sistema completo que inclui um circuito de medida de impedância e compensação do desempenho do amplificador em tempo real.Programa Doutoral em Engenharia Eletrotécnic

Surpassing Fundamental Limits through Time Varying Electromagnetics

Surpassing the fundamental limits that govern all electromagnetic structures, such as reciprocity and the delay-bandwidth-size limit, will have a transformative impact on all applications based on electromagnetic circuits and systems. For instance, violating principles of reciprocity enables non-reciprocal components such as isolators and circulators, which find application in full-duplex wireless radios, radar, biomedical imaging, and quantum computing systems. Overcoming the delay-bandwidth-size limit enables ultra-broadband yet extremely-compact devices whose size is not fundamentally related to the wavelength at the operating frequency. The focus of this dissertation is on using time-variance as a new toolbox to overcome these fundamental limits and re-imagine circuit and system design. Traditional non-reciprocal components are realized using ferrite materials that loose their reciprocity under the application of external magnetic bias. However, the sheer volume, cost and weight of these magnet based non-reciprocal components coupled with their inability to be fabricated in conventional semiconductor processes, have limited their application to bulky and large-scale systems. Other approaches such as active-biased and non-linearity based non-reciprocity are compatible with semiconductor processes, however, they suffer from other poor linearity and noise performance. In this dissertation, using passive transistor switch as the modulating element, we have proposed the concept of spatio-temporal conductivity modulation and have demonstrated a gamut of non-reciprocal devices ranging from gyrators to isolators and circulators. Through novel circuit topologies, for the first time, we have demonstrated on-chip circulators with multi-watt input power handling, operation at high millimeter-wave frequencies, and tailor made circulators for emerging technologies such as simultaneous-transmit-and-receive MRI and quantum computing. Delay-bandwidth-size trade-off is another fundamental electromagnetic limit, that constrains the delay imparted by a medium or a device within a fixed footprint to be inversely proportional to the signal bandwidth. It is this limit that governs the size of any microwave passive devices to be inversely proportional to its operating frequency. As a part of this dissertation, through intelligent clocking of switched capacitor networks we overcame the delay-bandwidth-size limit, thus resulting in infinitesimal, yet broadband microwave devices. Here we proposed a new paradigm in wave propagation where the properties such as the propagation delay and characteristic impedance does not depend on the constituent elements/materials of the medium, but rather heavily rely on the user-defined modulation scheme, thereby opening huge opportunities for realizing highly-reconfigurable passives. Leveraging these concepts, we demonstrated wide range of reciprocal an non-reciprocal devices including ultra-compact delay elements, highly-reconfigurable microwave passives, ultra-wideband circulators with infinitesimal form-factors and dispersion-free chip scale floquet topological insulators. Application of these devices have also been evaluated in real-world systems through our demonstrations of wideband, full-duplex receivers leveraging switched capacitors based true-time-delay interference cancelers and floquet topological insulator based antenna interfaces for full-duplex phased-arrays and ultra-wideband beamformers. Furthermore, to cater the growing RF and microwave needs of future, large-scale quantum computing systems, we demonstrated a low-cryogenic, wideband circulator based on time modulation of superconducting devices. This superconducting circulator is expected to operate alongside the superconducting qubits, inside a dilution refrigerator at 10mK-100mK, thus enabling a tightly integrated quantum system. We also presented the design and implementation of a cryogenic-CMOS clock driver chip that will generate the clocks required by the superconducting circulator. Finally, we also demonstrated the design and implementation of a low-noise, low power consumption, 6GHz - 8GHz cryogenic downconversion receiver at 4K for cryogenic qubit readout

Design and Implementation of High-Efficiency, Lightweight, System-Friendly Solid-State Circuit Breaker

Direct current (DC) distribution system has shown potential over the alternative current (AC) distribution system in some application scenarios, e.g., electrified transportation, renewable energy, data center, etc. Because of the fast response speed, DC solid-state circuit breaker (SSCB) becomes a promising technology for the future power electronics intensive DC energy system with fault-tolerant capability. First, a thorough literature survey is performed to review the DC-SSCB technology. The key components for DC-SSCB, including power semiconductors, topologies, energy absorption units, and fault detection circuits, are studied. It is observed that the prior studies mainly focus on the basic interruption capability of the DC-SSCB. There are not so many studies on SSCB’s size optimization or system-friendly functions. Second, an insulated gate bipolar transistor (IGBT) based lightweight SSCB is proposed. With the reduced gate voltage, the proposed SSCB can limit the peak fault current without the bulky and heavy fault current limiting the inductor, which exists in the conventional SSCB circuit. Thus, the specific power density of the SSCB is substantially improved compared with the conventional design. Meanwhile, to understand the impact of different design parameters on the performance of SSCB, an analytical model is built to establish the relationship between SSCB dynamic performance and operating conditions considering the key components and circuit parasitics. Simulation and test results demonstrate the accuracy of the proposed model. To limit the fault current with the proposed SSCB without a current limiting inductor, power semiconductors need to operate in the active region temporarily. During this interval, a severe voltage oscillation has been observed experimentally, leading to the DC-SSCB overstress and eventually the failure. A detailed MATLAB/Simulink model is built to understand the mechanism causing the voltage oscillation. Three suppression methods using enhanced gate drive circuitry are proposed and compared. Test results based on a 2kV/1kA SSCB prototype demonstrate the effectiveness of the proposed oscillation mitigation method and the accuracy of the derived model. Meanwhile, when the system fault impedance is close to zero (e.g., high di/dt), the influence of the parasitic inductance contributed by interconnection (e.g., bus bar, module package, etc.) cannot be neglected. To study the influence of the bus bar connections on SSCB with high di/dt, a Q3D extractor is adopted to extract the parasitic parameters of the SSCB and understand the influence of different bus bar connections. A vertical bus bar is proposed to suppress the side effect and verified by the Q3D extractor and experimental results. Finally, a system-friendly SSCB is demonstrated. The proposed gate drive enables the SSCB to operate in the current limitation mode for the overcurrent limitation. The current limitation level and limitation time can be tuned by the gate drive. Then, this dissertation provides an all-in-one solution with integrated circuitries as the fault detector, actuator for the semiconductor’s operating status regulation, and coordinated control. This allows the developed SSCB to limit system fault current not exceeding short-circuit current rating (SCCR) and also take different responses under different fault cases. The feasibility and the effectiveness of the proposed system-friendly SSCB are validated with experimental results based on a 200V/10A SSCB demonstrator

Hybrid WDM-TDM Optical Communication and Data Link

A hybrid WDM-TDM optical link employing a hybrid modelocked multi-wavelength semiconductor which provides approximately 4 to approximately 20 wavelength channels that makes possible modulated multiplexed data which when demultiplexed by ultra fast optical demultiplexing provides rates suitable for conventional electronic photo receivers. The link uses single-stripe GaAs/AlGaAs semiconductor optical amplifiers which simultaneously generate from approximately four to more than approximately twenty tunable WDM channels. Diode laser can also include InP, InGaAlP, InGaAsP, InGaP, InGaAs. A four channel version transmits approximately 12 picosecond pulses at approximately 2.5 GHz for an aggregate pulse rate of 100 GHz. When generating approximately 20 wavelength channels, each transmitting approximately 12 picosecond pulses at a rate of approximately 600 MHz, there is provided optical data and transmission systems operating at rates in excess of 800 Gbits/s